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SHORT AND LONG TRAINING FIELDS

  • US 20110051747A1
  • Filed: 08/25/2010
  • Published: 03/03/2011
  • Est. Priority Date: 08/31/2009
  • Status: Active Grant
First Claim
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1. An integrated circuit, comprising logic configured to:

  • generate a packet comprising a short training field as part of a synchronization header and a long training field as part of the synchronization header;

    use the packet for communication in a wireless network.

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