METHOD, DEVICE, AND COMPUTER-READABLE STORAGE MEDIUM FOR PRODUCING DIGITAL SIDE TONE
First Claim
Patent Images
1. A method for producing digital side tone in a communication device configured with a primary processing unit and a secondary processing unit, comprisingreading X samples output from a digital decimator at a rate equal to an output sampling rate of a first interpolator, storing the X read samples in a sample buffer, and outputting the X read samples as X digital side tone samples to a digital-to-analog converter (DAC);
- decimating, by a first decimator, k·
X samples stored in the sample buffer by a factor k, and outputting X yielded samples to a second decimator;
decimating, by the second decimator, the X yielded samples, and outputting to the primary processing unit a single sample at a rate equal to the sampling frequency of samples input to the DAC;
discarding k−
1 samples for every k samples read by the primary processing unit;
continually shifting the k·
X samples stored in the sample buffer by a factor X thereby accommodating additional sets of X samples read from the digital decimator per frame;
interpolating, by the first interpolator, a single sample received from the primary processing unit by a factor X and outputting X interpolated samples; and
mixing, by a mixer, the X interpolated samples with the X digital side tone samples, and outputting the results as X side tone mixed samples,the secondary processing unit including an analog-to-digital converter (ADC) configured with the digital decimator, the first decimator and the second decimator, the DAC configured with the first interpolator, the sample buffer of length k·
X, and the mixer, andthe sampling frequency of samples input to the DAC being an integer multiple k of a sampling frequency of samples read from the ADC and X being the decimator factor of the second decimator
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Abstract
A method, device, and computer-readable storage medium for providing digital side tone are disclosed. These embodiments are directed toward processing digital side tone in a secondary processing unit external to a primary processing unit that includes the main digital signal processor, thereby reducing delay in producing side tone and freeing up processing resources in the primary processing unit. In an environment where the sampling rate of a digital-to-analog converter in the secondary processing unit is an integer multiple of the sampling rate of an analog-to-digital converter in the secondary processing unit, the components of the secondary processing unit are made to operate such that the digital side tone signal and the main tone signal are equal in sampling frequency and number of samples.
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Citations
20 Claims
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1. A method for producing digital side tone in a communication device configured with a primary processing unit and a secondary processing unit, comprising
reading X samples output from a digital decimator at a rate equal to an output sampling rate of a first interpolator, storing the X read samples in a sample buffer, and outputting the X read samples as X digital side tone samples to a digital-to-analog converter (DAC); -
decimating, by a first decimator, k·
X samples stored in the sample buffer by a factor k, and outputting X yielded samples to a second decimator;decimating, by the second decimator, the X yielded samples, and outputting to the primary processing unit a single sample at a rate equal to the sampling frequency of samples input to the DAC; discarding k−
1 samples for every k samples read by the primary processing unit;continually shifting the k·
X samples stored in the sample buffer by a factor X thereby accommodating additional sets of X samples read from the digital decimator per frame;interpolating, by the first interpolator, a single sample received from the primary processing unit by a factor X and outputting X interpolated samples; and mixing, by a mixer, the X interpolated samples with the X digital side tone samples, and outputting the results as X side tone mixed samples, the secondary processing unit including an analog-to-digital converter (ADC) configured with the digital decimator, the first decimator and the second decimator, the DAC configured with the first interpolator, the sample buffer of length k·
X, and the mixer, andthe sampling frequency of samples input to the DAC being an integer multiple k of a sampling frequency of samples read from the ADC and X being the decimator factor of the second decimator - View Dependent Claims (2, 3, 4, 5, 6, 7)
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8. A communication device capable of producing digital side tone, comprising:
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a transceiver; a primary processing unit cooperatively operable with the transceiver and configured for performing communication functions; and a secondary processing unit cooperatively operable with the primary processing unit, the secondary processing unit including an analog-to-digital converter (ADC) configured with a first decimator and a second decimator, a digital-to-analog converter (DAC) configured with a first interpolator, a sample buffer of length k·
X, and a mixer, a sampling frequency of samples input to the DAC being an integer multiple k of a sampling frequency of samples read from the ADC, and X being the decimator factor of the second decimator, whereinthe ADC is further configured with a digital decimator that outputs X samples at a rate equal to an output sampling rate of the first interpolator, the X read samples being stored in the sample buffer, and the X read samples being output as digital side tone samples to the DAC; the ADC is configured so that the first decimator decimates k·
X samples stored in the sample buffer by a factor k and outputs X yielded samples to the second decimator;the ADC is configured so that the second decimator decimates the X yielded samples and outputs to the primary processing unit a single sample at a rate equal to the sampling frequency of samples input to the DAC; the primary processing unit is configured to discard k−
1 samples for every k samples it reads from the second decimator;the sample buffer is configured to continually shift the k·
X samples stored in the sample buffer by a factor X thereby accommodating additional sets of X samples read from the digital decimator per frame;the DAC is configured so that the first interpolator interpolates a single sample received from the primary processing unit by a factor X and outputs X interpolated samples; and the mixer is configured to mix the X interpolated samples with the X digital side tone samples and to output the results as X side tone mixed samples. - View Dependent Claims (9, 10, 11, 12, 13, 14)
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15. A computer-readable storage medium comprising instructions for execution by a processor, the instructions including a processor-implemented method for producing digital side tone in a communication device with a primary processing unit and a secondary processing unit, the instructions for implementing:
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reading X samples output from a digital decimator at a rate equal to an output sampling rate of a first interpolator, storing the X read samples in a sample buffer, and outputting the X read samples as X digital side tone samples to a digital-to-analog converter (DAC); decimating, in a first decimator, k·
X samples stored in the sample buffer by a factor k, and outputting X yielded samples to a second decimator;decimating, in the second decimator, the X yielded samples, and outputting to the primary processing unit a single sample at a rate equal to the sampling frequency of samples input to the DAC; discarding k−
1 samples for every k samples read by the primary processing unit;continually shifting the k·
X samples stored in the sample buffer by a factor X thereby accommodating additional sets of X samples read from the digital decimator per frame;interpolating, in a first interpolator, a single sample received from the primary processing unit by a factor X and outputting X interpolated samples; and mixing, in a mixer, the X interpolated samples with the X digital side tone samples, and outputting the results as X side tone mixed samples, the secondary processing unit including an analog-to-digital converter (ADC) configured with the digital decimator, the first decimator and the second decimator, the DAC configured with the first interpolator, and the sample buffer of length k·
X,the sampling frequency of samples input to the DAC being an integer multiple k of a sampling frequency of samples read from the ADC and X being the decimator factor of the second decimator. - View Dependent Claims (16, 17, 18, 19, 20)
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Specification
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Current AssigneeTexas Instruments, Inc.
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Original AssigneeTexas Instruments, Inc.
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InventorsARAVIND BATNI, Ramachandra
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Application NumberUS12/549,771Publication NumberTime in Patent OfficeDaysField of SearchUS Class Current379/391CPC Class CodesH04M 1/58 Anti-side-tone circuits
