Method of fabricating semiconductor substrate and method of fabricating light emitting device

• US 20110053303A1
• Filed: 08/26/2010
• Published: 03/03/2011
• Est. Priority Date: 08/26/2009
• Status: Active Grant

• Current Assignee: Seoul Viosys Co., Ltd. (Seoul Semiconductor Co., Ltd.)
• Original Assignee: Seoul Optodevice Company Limited (Seoul Semiconductor Co., Ltd.)
• Inventors: Lee, Joon Hee, Kim, Kyoung Wan, Kim, Chang Youn, Moon, Soo Young, Kim, Hwa Mok, Sakai, Shiro
• Granted Patent: US 8,026,119 B2
• Time in Patent Office: Days
• US Class Current: 438/46
• CPC Class Codes: H01L 21/0242 Crystalline insulating materials
• CPC Class Codes: H01L 21/02458 Nitrides
• CPC Class Codes: H01L 21/02488 Insulating materials
• CPC Class Codes: H01L 21/02491 Conductive materials
• CPC Class Codes: H01L 21/02502 consisting of two layers
• CPC Class Codes: H01L 21/0254 Nitrides
• CPC Class Codes: H01L 21/02639 Preparation of substrate for selective deposition
• CPC Class Codes: H01L 33/005 Processes
• CPC Class Codes: H01L 33/007 comprising nitride compounds
• CPC Class Codes: H01L 33/0093 Wafer bonding; Removal of the growth substrate

Abstract

The present invention provides a method of fabricating a semiconductor substrate and a method of fabricating a light emitting device. The method includes forming a first semiconductor layer on a substrate, forming a metallic material layer on the first semiconductor layer, forming a second semiconductor layer on the first semiconductor layer and the metallic material layer, wherein a void is formed in a first portion of the first semiconductor layer under the metallic material layer during formation of the second semiconductor layer, and separating the substrate from the second semiconductor layer by etching at least a second portion of the first semiconductor layer using a chemical solution.

Claims

1. A method of fabricating a semiconductor substrate, the method comprising:

forming a first semiconductor layer on a substrate;

forming a metallic material layer on the first semiconductor layer;

forming a second semiconductor layer on the first semiconductor layer and the metallic material layer, wherein a void is formed in a first portion of the first semiconductor layer under the metallic material layer during formation of the second semiconductor layer; and

separating the substrate from the second semiconductor layer by etching at least a second portion of the first semiconductor layer using a chemical solution.

2. The method of claim 1, wherein the metallic material layer comprises a plurality of stripe-shaped portions spaced apart from each other by a constant distance,

wherein each stripe-shaped portion comprises a constant width, and

wherein the second semiconductor layer covers the metallic material layer.

3. The method of claim 1, wherein the metallic material layer comprises an oxide layer, the oxide layer forming a mask for the first semiconductor layer.

4. The method of claim 3, wherein the metallic material layer is formed in a thickness in the range of 5 nm to 100 nm, thereby allowing a plurality of holes to be connected to the first semiconductor layer and the second semiconductor layer through the metallic material layer.

5. The method of claim 1, wherein the metallic material layer comprises a metallic material comprising a higher melting point than a heating temperature at which the second semiconductor layer is formed.

6. The method of claim 1, wherein the metallic material layer comprises an oxide layer forming a mask on the first semiconductor layer, and a plurality of holes is formed that penetrates the metallic material layer,

wherein the second semiconductor layer is formed using a metal organic chemical vapor deposition technique, and

wherein the first semiconductor layer formed under the first portion of the metallic material layer reacts with the metallic material layer and oxygen, and the first semiconductor layer evaporates through the plurality of holes to form the void.

7. The method of claim 1, wherein the metallic material layer comprises tantalum and has a thickness in the range of 5 nm to 100 nm, and

wherein tantalum oxide is formed on a surface of the tantalum after the metallic material layer is formed on the first semiconductor layer.

8. The method of claim 1, wherein the substrate comprises sapphire or silicon.

9. The method of claim 1, wherein the chemical solution comprises at least one selected from the group consisting of KOH, NaOH, H₂PO₄, HCL, and H₂SO₄.

10. The method of claim 1, wherein etching the first semiconductor layer using the chemical solution comprises wet-type etching, photo-enhanced chemical etching, or photo electrochemical etching.

11. A method of fabricating a light emitting device, the method comprising:

forming a first semiconductor layer on a first substrate;

forming a metallic material layer on the first semiconductor layer;

forming a second semiconductor layer on the first semiconductor layer and the metallic material layer, wherein a void is formed in a first portion of the first semiconductor layer under the metallic material layer during formation of the second semiconductor layer;

forming a first compound semiconductor layer on the second semiconductor layer;

forming an active layer on the first compound semiconductor layer;

forming a second compound semiconductor layer on the active layer;

attaching a second substrate to the second compound semiconductor layer; and

separating the first substrate from the second semiconductor layer by etching at least a second portion of the first semiconductor layer using a chemical solution.

12. The method of claim 11, wherein the metallic material layer comprises a plurality of stripe-shaped portions spaced apart from each other by a constant distance,

wherein each stripe-shaped portion comprises a constant width, and

wherein the second semiconductor layer covers the metallic material layer.

13. The method of claim 11, wherein the metallic material layer comprises an oxide layer, the oxide layer forming a mask for the first semiconductor layer.

14. The method of claim 13, wherein the metallic material layer is formed in a thickness in the range of 5nm to 100nm, thereby allowing a plurality of holes to be connected to the first semiconductor layer and the second semiconductor layer through the metallic material layer.

15. The method of claim 11, wherein the metallic material layer comprises a metallic material comprising a higher melting point than a heating temperature at which the second semiconductor layer is formed.

16. The method of claim 11, wherein the metallic material layer comprises an oxide layer forming a mask on the first semiconductor layer, and a plurality of holes is formed that penetrates the metallic material layer,

wherein the second semiconductor layer is formed using a metal organic chemical vapor deposition technique, and

wherein the first semiconductor layer formed under the first portion of the metallic material layer reacts with the metallic material layer and oxygen, and the first semiconductor layer evaporates through the plurality of holes to form the void.

17. The method of claim 11, wherein the metallic material layer comprises tantalum and has a thickness in the range of 5 nm to 100 nm, and

wherein tantalum oxide is formed on a surface of the tantalum after the metallic material layer is formed on the first semiconductor layer.

18. The method of claim 11, wherein the first substrate comprises sapphire substrate or silicon.

19. The method of claim 11, wherein the chemical solution comprises at least one selected from the group consisting of KOH, NaOH, H₂PO₄, HCL, and H₂SO₄.

20. The method of claim 11, wherein etching the first semiconductor layer using the chemical solution comprises wet-type etching, photo-enhanced chemical etching or photo electrochemical etching.

21. A method of fabricating a semiconductor substrate, the method comprising:

forming a first semiconductor layer on a substrate;

forming a metallic material layer on the first semiconductor layer;

forming a second semiconductor layer on the first semiconductor layer and the metallic material layer, wherein a void is formed in a first portion of the first semiconductor layer under the metallic material layer during formation of the second semiconductor layer; and

growing the void in the first semiconductor layer by heating the substrate after forming the second semiconductor layer.

22. The method of claim 21, wherein the metallic material layer comprises a plurality of stripe-shaped portions spaced apart from each other by a constant distance,

wherein each stripe-shaped portion comprises a constant width, and

wherein the second semiconductor layer covers the metallic material layer.

23. The method of claim 21, wherein the metallic material layer comprises an oxide layer, the oxide layer forming a mask for the first semiconductor layer.

24. The method of claim 23, wherein the metallic material layer is formed in a thickness in the range of 5 nm to 100 nm, thereby allowing a plurality of holes to be connected to the first semiconductor layer and the second semiconductor layer through the metallic material layer.

25. The method of claim 21, wherein the metallic material layer comprises a metallic material comprising a higher melting point than a heating temperature at which the second semiconductor layer is formed.

26. The method of claim 21, wherein the metallic material layer comprises an oxide layer forming a mask on the first semiconductor layer, and a plurality of holes is formed that penetrates the metallic material layer,

wherein the second semiconductor layer is formed using a metal organic chemical vapor deposition technique, and

wherein the first semiconductor layer formed under the first portion of the metallic material layer reacts with the metallic material layer and oxygen, and the first semiconductor layer evaporates through the plurality of holes to form the void.

27. The method of claim 21, wherein the metallic material layer comprises tantalum and has a thickness in the range of 5 nm to 100 nm, and

wherein tantalum oxide is formed on a surface of the tantalum after the metallic material layer is formed on the first semiconductor layer.

28. The method of claim 21, wherein the substrate comprises sapphire or silicon.

29. The method of claim 21, wherein the substrate is heated to a temperature in the range of 900˜

1100°

C.

30. The method of claim 21, wherein the metallic material layer comprises at least one of Ta, Ni, Cr, Pt, Mo, and alloys thereof.

31. A method of fabricating a light emitting device, the method comprising:

forming a first semiconductor layer on a first substrate;

forming a metallic material layer on the first semiconductor layer;

forming a second semiconductor layer on the first semiconductor layer and the metallic material layer, wherein a void is formed in a first portion of the first semiconductor layer under the metallic material layer during formation of the second semiconductor layer;

forming a first compound semiconductor layer on the second semiconductor layer;

forming an active layer on the first compound semiconductor layer;

forming a second compound semiconductor layer on the active layer;

attaching a second substrate to the second compound semiconductor layer; and

growing the void in the first semiconductor layer by heating the first substrate after attaching the second substrate.

32. The method of claim 31, wherein the metallic material layer comprises a plurality of stripe-shaped portions spaced apart from each other by a constant distance,

wherein each stripe-shaped portion comprises a constant width, and

wherein the second semiconductor layer covers the metallic material layer.

33. The method of claim 31, wherein the metallic material layer comprises an oxide layer, the oxide layer forming a mask for the first semiconductor layer.

34. The method of claim 33, wherein the metallic material layer is formed in a thickness in the range of 5 nm to 100 nm, thereby allowing a plurality of holes to be connected to the first semiconductor layer and the second semiconductor layer through the metallic material layer.

35. The method of claim 31, wherein the metallic material layer comprises a metallic material comprising a higher melting point than a heating temperature at which the second semiconductor layer is formed.

36. The method of claim 31, wherein the metallic material layer comprises an oxide layer forming a mask on the first semiconductor layer, and a plurality of holes is formed that penetrates the metallic material layer,

wherein the second semiconductor layer is formed using a metal organic chemical vapor deposition technique, and

wherein the first semiconductor layer formed under the first portion of the metallic material layer reacts with the metallic material layer and oxygen, and the first semiconductor layer evaporates through the plurality of holes to form the void.

37. The method of claim 31, wherein the metallic material layer comprises tantalum and has a thickness in the range of 5 nm to 100 nm, and

wherein tantalum oxide is formed on a surface of the tantalum after the metallic material layer is formed on the first semiconductor layer.

38. The method of claim 31, wherein the first substrate comprises sapphire or silicon.

39. The method of claim 31, wherein the first substrate is heated to a temperature in the range of 900˜

1100°

C.

40. The method of claim 31, wherein the first substrate is heated while the second substrate is attached to the second semiconductor layer.

41. A method of fabricating a semiconductor substrate, the method comprising:

forming a first semiconductor layer on a substrate;

forming a metallic material layer on the first semiconductor layer;

forming a second semiconductor layer on the first semiconductor layer and the metallic material layer, wherein a void is formed in a first portion of the first semiconductor layer under the metallic material layer during formation of the second semiconductor layer; and

evaporating reaction by-products of the metallic material layer and nitrogen to remove the reaction by-products formed during formation of the void.

42. The method of claim 41, wherein the metallic material layer comprises tantalum and the reaction by-products comprise Ta and N.

43. The method of claim 42, wherein the second semiconductor layer is a GaN-based compound semiconductor and is formed by metal organic chemical vapor deposition, and the reaction by-products are evaporated by adjusting a growth temperature, growth pressure, growth speed, and flux of a Ga source of the second semiconductor layer.

44. The method of claim 43, wherein the Ga source comprises TMGa and the flux of the TMGa is less than 87 μ

mol/min.

45. The method of claim 41, wherein the evaporation of the reaction by-products comprises maintaining the substrate at a temperature at which the reaction by-products are evaporated, after stopping the growth of the second semiconductor layer or after completing the growth of the second semiconductor layer.

46. The method of claim 41, wherein the evaporation of the reaction by-products comprises lowering a pressure around the substrate to a pressure at which the reaction by-products are evaporated, after stopping the growth of the second semiconductor layer or after completing the growth of the second semiconductor layer.

47. The method of claim 41, wherein the metallic material layer comprises a metallic material comprising a higher melting point than a heating temperature at which the second semiconductor layer is formed.

48. The method of claim 41, wherein the metallic material layer comprises an oxide layer forming a mask on the first semiconductor layer, and a plurality of holes is formed that penetrates the metallic material layer,

wherein the second semiconductor layer is formed using a metal organic chemical vapor deposition technique, and

wherein the first semiconductor layer formed under the first portion of the metallic material layer reacts with the metallic material layer and oxygen, and the first semiconductor layer evaporates through the plurality of holes to form the void.

49. The method of claim 41, wherein the substrate comprises sapphire or silicon.

50. The method of claim 41, further comprising separating the substrate using the void formed in the first semiconductor layer to fabricate a semiconductor substrate formed from the first semiconductor layer and the second semiconductor layer.

51. A method of fabricating a light emitting device, the method comprising:

forming a first semiconductor layer on a substrate;

forming a metallic material layer on the first semiconductor layer;

forming a second semiconductor layer on the first semiconductor layer and the metallic material layer, wherein a void is formed in a first portion of the first semiconductor layer under the metallic material layer during formation of the second semiconductor layer;

forming a first compound semiconductor layer on the second semiconductor layer;

forming an active layer on the first compound semiconductor layer;

forming a second compound semiconductor layer on the active layer; and

evaporating reaction by-products of the metallic material layer and nitrogen to remove the reaction by-products formed during formation of the void.

52. The method of claim 51, wherein the metallic material layer comprises tantalum and the reaction by-products comprise Ta and N.

53. The method of claim 52, wherein the second semiconductor layer is a GaN-based compound semiconductor and is formed by metal organic chemical vapor deposition, and the reaction by-products are evaporated by adjusting a growth temperature, growth pressure, growth speed, and flux of a Ga source of the second semiconductor layer.

54. The method of claim 53, wherein the Ga source comprises TMGa and the flux of the TMGa is less than 87 μ

mol/min.

55. The method of claim 51, wherein the evaporation of the reaction by-products comprises maintaining the substrate at a temperature at which the reaction by-products are evaporated, after stopping the growth of the second semiconductor layer or after completing the growth of the second semiconductor layer.

56. The method of claim 51, wherein the evaporation of the reaction by-products comprises lowering a pressure around the substrate to a pressure at which the reaction by-products are evaporated, after stopping the growth of the second semiconductor layer or after completing the growth of the second semiconductor layer.

57. The method of claim 51, wherein the metallic material layer comprises a metallic material comprising a higher melting point than a heating temperature at which the second semiconductor layer is formed.

58. The method of claim 51, wherein the metallic material layer comprises an oxide layer forming a mask on the first semiconductor layer, and a plurality of holes is formed that penetrates the metallic material layer,

wherein the second semiconductor layer is formed using a metal organic chemical vapor deposition technique, and

wherein the first semiconductor layer formed under the first portion of the metallic material layer reacts with the metallic material layer and oxygen, and the first semiconductor layer evaporates through the plurality of holes to form the void.

59. The method of claim 51, wherein the substrate comprises sapphire or silicon.

60. The method of claim 51, further comprising separating the substrate using the void formed in the first semiconductor layer.

61. The method of claim 51, wherein the first semiconductor layer comprises a GaN-based compound semiconductor and is formed by metal organic chemical vapor deposition, and the reaction by-products are evaporated by adjusting a growth temperature, growth pressure, growth speed, and flux of a Ga source of the first semiconductor layer.

62. The method of claim 61, wherein the Ga source of the first compound semiconductor layer comprises TMGa and the flux of the TMGa is less than 87 μ

mol/min.

63. A method of fabricating a light emitting device, the method comprising:

forming, in a first chamber, a second semiconductor layer on a substrate comprising a first semiconductor layer and a metallic material layer on the first semiconductor layer, wherein a void is formed in a first portion of the first semiconductor layer under the metallic material layer during formation of the second semiconductor layer;

transferring the substrate comprising the second semiconductor layer from the first chamber to a second chamber; and

forming, in the second chamber, a compound semiconductor layer on the second semiconductor layer.

64. The method of claim 63, wherein the substrate remains under vacuum while being transferred.

65. The method of claim 63, wherein the metallic material layer comprises a plurality of stripe-shaped portions spaced apart from each other by a constant distance,

wherein each stripe-shaped portion comprises a constant width, and

wherein the second semiconductor layer covers the metallic material layer.

66. The method of claim 63, wherein the metallic material layer comprises an oxide layer, the oxide layer forming a mask on the first semiconductor layer.

67. The method of claim 66, wherein the metallic material layer is formed in a thickness in the range of 5 nm to 100 nm, thereby allowing a plurality of holes to be connected to the first semiconductor layer and the second semiconductor layer through the metallic material layer.

68. The method of claim 63, wherein the first semiconductor layer and the second semiconductor layer comprise the same or different compound semiconductor materials, and the metallic material layer comprise a material comprising a higher melting point than a heating temperature at which the second semiconductor layer is formed.

69. The method of claim 63, wherein the metallic material layer comprises an oxide layer forming a mask on the first semiconductor layer, and a plurality of holes is formed that penetrates the metallic material layer,

wherein the second semiconductor layer is formed using a metal organic chemical vapor deposition technique, and

wherein the first semiconductor layer formed under the first portion of the metallic material layer reacts with the metallic material layer and oxygen, and the first semiconductor layer evaporates through the plurality of holes to form the void.

70. The method of claim 63, wherein the metallic material layer comprises tantalum and has a thickness greater than 5 nm, tantalum oxide is formed on a surface of the tantalum after the metallic material layer is formed on the first semiconductor layer, and an interface between the first semiconductor layer and the tantalum layer is covered with tantalum and tantalum oxide after the metallic material layer is formed on the first semiconductor layer.

71. The method of claim 63, wherein the substrate comprises sapphire silicon.

72. The method of claim 63, wherein the formation of the compound semiconductor layer comprises:

forming a first compound semiconductor layer;

forming an active layer on the first compound semiconductor layer; and

forming a second compound semiconductor layer on the active layer.

73. The method of claim 72, further comprising:

attaching a secondary substrate to the second compound semiconductor layer; and

separating the substrate using the void formed in the first semiconductor layer.