METAL-OXIDE-SEMICONDUCTOR CHIP AND FABRICATION METHOD THEREOF
First Claim
1. A metal oxide semiconductor (MOS) chip, comprising:
- a heavily doped semiconductor substrate, composing a drain doped region;
an epitaxial layer, which is located on the semiconductor substrate, having an active region, a termination region, and a scribe line preserving region defined on an upper surface thereof and having an etched sidewall in the scribed line preserving region extending to an upper surface of the semiconductor substrate, and a boundary portion of the upper surface of the semiconductor substrate being exposed;
at least a MOS cell, located in the active region; and
a metal pattern layer, located on the epitaxial layer and the exposed semiconductor substrate, the metal pattern layer having a gate pad, a source pad, and a drain pattern, wherein the gate pad is electrically connected to a gate electrode of the MOS cell, the source pad is electrically connected to a source electrode of the MOS cell, and at least a portion of the drain pattern is located on the upper surface of the semiconductor substrate.
1 Assignment
0 Petitions
Accused Products
Abstract
A metal-oxide-semiconductor chip having a semiconductor substrate, an epitaxial layer, at least a MOS cell, and a metal pattern layer is provided. The epitaxial layer is located on the semiconductor substrate and has an active region, a termination region, and a scribe line preserving region defined on an upper surface thereof. An etched sidewall of the epitaxial layer is located in the scribe line preserving region. The boundary portion of the upper surface of the semiconductor substrate is thus exposed. The MOS cell is located in the active region. The metal pattern layer is located on the epitaxial layer and has a gate pad coupled to the gate of the MOS cell, a source pad coupled to the source of the MOS cell, and a drain pattern, which is partly located on the upper surface of the semiconductor substrate.
-
Citations
18 Claims
-
1. A metal oxide semiconductor (MOS) chip, comprising:
-
a heavily doped semiconductor substrate, composing a drain doped region; an epitaxial layer, which is located on the semiconductor substrate, having an active region, a termination region, and a scribe line preserving region defined on an upper surface thereof and having an etched sidewall in the scribed line preserving region extending to an upper surface of the semiconductor substrate, and a boundary portion of the upper surface of the semiconductor substrate being exposed; at least a MOS cell, located in the active region; and a metal pattern layer, located on the epitaxial layer and the exposed semiconductor substrate, the metal pattern layer having a gate pad, a source pad, and a drain pattern, wherein the gate pad is electrically connected to a gate electrode of the MOS cell, the source pad is electrically connected to a source electrode of the MOS cell, and at least a portion of the drain pattern is located on the upper surface of the semiconductor substrate. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8)
-
-
9. A fabrication method of a metal-oxide-semiconductor chip, comprising the steps of:
-
providing a heavily doped semiconductor substrate; forming an epitaxial layer on an upper surface of the semiconductor substrate, the epitaxial layer having a plurality of active regions, a plurality of termination regions and a scribe line preserving region defined on the upper surface thereof, wherein the active regions are surrounded by the termination regions respectively and the termination regions are surrounded by the scribe line preserving region; forming a least one MOS cell in the active region; forming a deep trench in the scribe line preserving region to expose a portion of the upper surface of the semiconductor substrate; forming a metal pattern layer on the epitaxial layer and the exposed semiconductor substrate, the metal pattern layer having at least a gate pad, a source pad, and a drain pattern, wherein the gate pad and the source pad are located in the active region and electrically connected to a gate electrode and a source electrode of the MOS cell and at least a portion of the drain pattern is located on the upper surface of the semiconductor substrate; and forming a scribe line along the scribe line preserving region to break the semiconductor substrate. - View Dependent Claims (10, 11, 12, 13, 14, 15, 16, 17, 18)
-
Specification