FUSE OF SEMICONDUCTOR DEVICE AND METHOD FOR FORMING THE SAME

• US 20110057290A1
• Filed: 07/11/2010
• Published: 03/10/2011
• Est. Priority Date: 09/10/2009
• Status: Active Grant

• Current Assignee: Hynix Semiconductor Incorporated (SK Hynix Inc.)
• Original Assignee: Hynix Semiconductor Incorporated (SK Hynix Inc.)
• Inventors: HAN, Dong Hee
• Granted Patent: US 8,441,096 B2
• Time in Patent Office: Days
• US Class Current: 257/529
• CPC Class Codes: H01L 23/5258 the change of state resulting from the use of an external beam, e.g. laser beam or ion beam
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/0002 Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Abstract

A fuse of a semiconductor device comprises: a fuse pattern formed on a semiconductor substrate; an insulating film covering one side of the fuse pattern and including a trench; a conductive line disposed on the insulating film including the trench. The fuse of the semiconductor device prevents generation of cracks in a fuse box by thermal and physical stress, thereby improving reliability of the semiconductor device.

Claims

1. A fuse of a semiconductor device comprising:

a fuse pattern formed over a semiconductor substrate;

an insulating film formed between the semiconductor substrate and the fuse pattern and including a trench between the adjacent fuse patterns; and

a conductive line formed over the trench and configured to divide the insulating film into a plurality of portions.

2. The fuse of the semiconductor device according to claim 1, further comprising a contact plug electrically coupling the semiconductor substrate and the fuse pattern.

3. The fuse of the semiconductor device according to claim 1, further comprising:

a metal line formed between the semiconductor substrate and the is fuse pattern; and

a contact plug electrically coupling the metal line and the fuse pattern.

4. The fuse of the semiconductor device according to claim 3, wherein the insulating film comprises:

a first insulating film electrically insulating the metal line and the fuse pattern; and

an interlayer insulating film electrically insulating the fuse pattern and the conductive line.

5. The fuse of the semiconductor device according to claim 3, wherein the insulating film comprises:

a second insulating film formed over the conductive line in the trench.

6. The fuse of the semiconductor device according to claim 1, wherein the conductive line is formed detached from the fuse pattern and the semiconductor substrate.

7. The fuse of the semiconductor device according to claim 1, further comprising:

a metal line formed between the semiconductor substrate and the fuse pattern; and

a contact plug electrically coupling the metal line and the fuse pattern,

wherein the insulating film comprises;

a first insulating film electrically insulating the metal line and is the fuse pattern;

an interlayer insulating film electrically insulating the fuse pattern and the conductive line; and

a second insulating film formed over the conductive line in the trench.

8. A method for forming a fuse of a semiconductor device, the method comprising:

forming a fuse pattern over a semiconductor substrate;

forming an insulating film covering one side of the fuse pattern and including a trench; and

forming a conductive line on the insulating film including the trench.

9. The method according to claim 8, wherein before forming the fuse pattern, the method comprises:

forming a metal layer over the semiconductor substrate;

patterning the metal layer to form a metal line;

forming a first insulating film on the metal line;

forming a contact hole in the first insulating film; and

forming a contact plug filling the contact hole.

10. The method according to claim 9, wherein the forming-a-fuse-pattern includes:

forming a fuse pattern layer over the first insulating film; and

patterning the fuse pattern layer to form the fuse pattern wherein the width of the trench is formed to be smaller than the fuse pattern.

11. The method according to claim 9, wherein the forming-an-insulating-film-including-the-trench includes:

forming an interlayer insulating film on the first insulating film and the fuse pattern; and

etching the interlayer insulating film and the first insulating film to form the trench.

12. The method according to claim 8, wherein after forming the conductive line, the method comprises:

forming a second insulating film on the insulating film including the conductive line; and

forming a polymide isoindro quindzoline (PIQ) layer on the second insulating film.

13. The method according to claim 12, wherein after forming a PIQ layer, the method comprises:

removing the PIQ layer and the second insulating film to expose the fuse pattern and the second insulting film over the conductive line in the trench.

14. A method for forming a fuse of a semiconductor device, the method comprising:

forming a fuse pattern over a semiconductor substrate;

forming an insulating film between the fuse pattern and the semiconductor substrate including a trench being formed between the adjacent fuse patterns; and

forming a conductive line over the trench, the conductive line being configured to divide the insulating film into a plurality of portions.

15. The method according to claim 14, further comprising:

forming a metal line over the semiconductor substrate; and

forming a contact plug electrically coupling the metal line and the fuse pattern.

16. The method according to claim 14, wherein the forming-an-insulating-film includes:

forming a first insulating film electrically insulating the metal line and the fuse pattern;

forming an interlayer insulating film electrically insulating the fuse pattern and the conductive line; and

forming a second insulating film formed over the conductive line in the trench.