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Circuits, Architectures, Apparatuses, Systems, Algorithms, and Methods for Memory with Multiple Power Supplies and/or Multiple Low Power Modes

  • US 20110058439A1
  • Filed: 09/09/2010
  • Published: 03/10/2011
  • Est. Priority Date: 09/09/2009
  • Status: Active Grant
First Claim
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1. A dual power supply memory, comprising:

  • peripheral circuitry operating at a first voltage;

    a memory array operating at a second voltage; and

    translation circuitry configured to receive an input from the peripheral circuitry at the first voltage and provide an output to the memory array at the second voltage, the translation circuitry further configured to prevent leakage from a power rail providing the second voltage.

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