METHOD OF MAKING A SEMICONDUCTOR CHIP ASSEMBLY WITH A POST/BASE HEAT SPREADER, A SIGNAL POST AND A CAVITY

• US 20110059578A1
• Filed: 07/12/2010
• Published: 03/10/2011
• Est. Priority Date: 03/25/2008
• Status: Active Grant

• Current Assignee: Bridge Semiconductor Corporation
• Original Assignee: Bridge Semiconductor Corporation
• Inventors: Lin, Charles W.C., Lim, Sangwhoo, Wang, Chia-Chung
• Granted Patent: US 8,241,962 B2
• Time in Patent Office: Days
• US Class Current: 438/118
• CPC Class Codes: H01L 21/486 Via connections through the substrate with or without pins
• CPC Class Codes: H01L 2224/04105 Bonding areas formed on an encapsulation of the semiconductor or solid-state body, e.g. bonding areas on chip-scale packages
• CPC Class Codes: H01L 2224/20 Structure, shape, material or disposition of high density interconnect preforms
• CPC Class Codes: H01L 2224/2929 with a principal constituent of the material being a polymer, e.g. polyester, phenolic based polymer, epoxy
• CPC Class Codes: H01L 2224/29339 Silver [Ag] as principal constituent
• CPC Class Codes: H01L 2224/45144 Gold (Au) as principal constituent
• CPC Class Codes: H01L 2224/48091 Arched
• CPC Class Codes: H01L 2224/49171 Fan-out arrangements
• CPC Class Codes: H01L 2224/73265 Layer and wire connectors
• CPC Class Codes: H01L 2224/8385 using a polymer adhesive, e.g. an adhesive based on silicone, epoxy, polyimide, polyester
• CPC Class Codes: H01L 2224/85205 Ultrasonic bonding
• CPC Class Codes: H01L 23/3677 Wire-like or pin-like cooling fins or heat sinks
• CPC Class Codes: H01L 23/5389 the chips being integrally enclosed by the interconnect and support structures
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/00014 the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
• CPC Class Codes: H01L 2924/01005 Boron [B]
• CPC Class Codes: H01L 2924/01006 Carbon [C]
• CPC Class Codes: H01L 2924/01012 Magnesium [Mg]
• CPC Class Codes: H01L 2924/01013 Aluminum [Al]
• CPC Class Codes: H01L 2924/01019 Potassium [K]
• CPC Class Codes: H01L 2924/01029 : Copper [Cu]
• CPC Class Codes: H01L 2924/01033 : Arsenic [As]
• CPC Class Codes: H01L 2924/0104 : Zirconium [Zr]
• CPC Class Codes: H01L 2924/01047 : Silver [Ag]
• CPC Class Codes: H01L 2924/01049 : Indium [In]
• CPC Class Codes: H01L 2924/01058 : Cerium [Ce]
• CPC Class Codes: H01L 2924/01074 : Tungsten [W]
• CPC Class Codes: H01L 2924/01079 : Gold [Au]
• CPC Class Codes: H01L 2924/01082 : Lead [Pb]
• CPC Class Codes: H01L 2924/01087 : Francium [Fr]
• CPC Class Codes: H01L 2924/014 : Solder alloys
• CPC Class Codes: H01L 2924/0665 : Epoxy resin
• CPC Class Codes: H01L 2924/15153 : the die mounting substrate comprising a recess for hosting the device
• CPC Class Codes: H01L 2924/351 : Thermal stress
• CPC Class Codes: H01L 33/486 : adapted for surface mounting
• CPC Class Codes: H01L 33/642 : characterized by the shape

Abstract

A method of making a semiconductor chip assembly includes providing a thermal post, a signal post and a base, mounting an adhesive on the base including inserting the thermal post into a first opening in the adhesive and the signal post into a second opening in the adhesive, mounting a conductive layer on the adhesive including aligning the thermal post with a first aperture in the conductive layer and the signal post with a second aperture in the conductive layer, then flowing the adhesive upward between the thermal post and the conductive layer and between the signal post and the conductive layer, solidifying the adhesive, providing a conductive trace that includes a pad, a terminal and the signal post, wherein the pad includes a selected portion of the conductive layer, mounting a semiconductor device on the thermal post, wherein a heat spreader includes the thermal post and the base and the semiconductor device extends into a cavity in the thermal post, electrically connecting the semiconductor device to the conductive trace and thermally connecting the semiconductor device to the heat spreader.

Claims

1-35. -35. (canceled)

36. A method of making a semiconductor chip assembly, comprising:

providing a thermal post, a signal post, a base, an adhesive and a conductive layer, wherein

the thermal post is adjacent to the base, extends above the base in an upward direction, extends into a first opening in the adhesive and is aligned with a first aperture in the conductive layer,

the signal post is adjacent to the base, extends above the base in the upward direction, extends into a second opening in the adhesive and is aligned with a second aperture in the conductive layer,

the base extends below the posts in a downward direction opposite the upward direction and extends laterally from the posts in lateral directions orthogonal to the upward and downward directions,

the adhesive is mounted on and extends above the base, is sandwiched between the base and the conductive layer and is non-solidified, and

the conductive layer is mounted on and extends above the adhesive;

then

flowing the adhesive into and upward in a first gap located in the first aperture between the thermal post and the conductive layer and in a second gap located in the second aperture between the signal post and the conductive layer;

solidifying the adhesive;

providing a conductive trace that includes a pad, a terminal and the signal post, wherein the pad includes a selected portion of the conductive layer and an electrically conductive path between the pad and the terminal includes the signal post;

mounting a semiconductor device on the thermal post, wherein a heat spreader includes the thermal post and the base and the semiconductor device extends into a cavity in the thermal post that faces in the upward direction;

electrically connecting the semiconductor device to the pad, thereby electrically connecting the semiconductor device to the terminal; and

thermally connecting the semiconductor device to the thermal post, thereby thermally connecting the semiconductor device to the base.

37. The method of claim 36, wherein providing the thermal post, the signal post and the base includes:

providing a metal plate;

forming an etch mask on the metal plate that selectively exposes the metal plate and defines the posts;

etching the metal plate in a pattern defined by the etch mask, thereby forming a recess in the metal plate that extends into but not through the metal plate; and

then

removing the etch mask, wherein the thermal post includes a first unetched portion of the metal plate that protrudes above the base and is laterally surrounded by the recess, the signal post includes a second unetched portion of the metal plate that protrudes above the base and is laterally surrounded by the recess, and the base includes an unetched portion of the metal plate below the posts and the recess.

38. The method of claim 36, wherein:

providing the adhesive includes providing a prepreg with uncured epoxy;

flowing the adhesive includes melting the uncured epoxy and compressing the uncured epoxy between the base and the conductive layer; and

solidifying the adhesive includes curing the uncured epoxy.

39. The method of claim 36, wherein flowing the adhesive includes filling the gaps with the adhesive.

40. The method of claim 36, wherein mounting the conductive layer includes mounting the conductive layer alone on the adhesive.

41. The method of claim 36, wherein mounting the conductive layer includes mounting the conductive layer and a dielectric layer on the adhesive.

42. The method of claim 36, wherein providing the pad includes removing selected portions of the conductive layer after solidifying the adhesive.

43. The method of claim 36, wherein providing the pad includes:

grinding the posts, the adhesive and the conductive layer such that the posts, the adhesive and the conductive layer are laterally aligned with one another at a top lateral surface that faces in the upward direction; and

then

removing selected portions of the conductive layer using an etch mask that defines the pad.

44. The method of claim 36, wherein providing the terminal includes removing selected portions of the base after solidifying the adhesive.

45. The method of claim 36, wherein mounting the semiconductor device includes providing a die attach between the semiconductor device and the thermal post, electrically connecting the semiconductor device includes providing a wire bond between the semiconductor device and the pad, and thermally connecting the semiconductor device includes providing the die attach between the semiconductor device and the thermal post.

46. A method of making a semiconductor chip assembly, comprising:

providing a thermal post, a signal post and a base, wherein the thermal post is adjacent to and integral with the base and extends above the base in an upward direction, the signal post is adjacent to and integral with the base and extends above the base in the upward direction, and the base extends below the posts in a downward direction opposite the upward direction and extends laterally from the posts in lateral directions orthogonal to the upward and downward directions;

providing an adhesive, wherein first and second openings extend through the adhesive;

providing a conductive layer, wherein first and second apertures extend through the conductive layer;

mounting the adhesive on the base, including inserting the thermal post into the first opening and the signal post into the second opening, wherein the adhesive extends above the base, the thermal post extends into the first opening and the signal post extends into the second opening;

mounting the conductive layer on the adhesive, including aligning the thermal post with the first aperture and the signal post with the second aperture, wherein the conductive layer extends above the adhesive and the adhesive is sandwiched between the base and the conductive layer and is non-solidified;

then

applying heat to melt the adhesive;

moving the base and the conductive layer towards one another, thereby moving the thermal post upward in the first aperture, moving the signal post upward in the second aperture and applying pressure to the molten adhesive between the base and the conductive layer, wherein the pressure forces the molten adhesive to flow into and upward in a first gap located in the first aperture between the thermal post and the conductive layer and in a second gap located in the second aperture between the signal post and the conductive layer;

applying heat to solidify the molten adhesive, thereby mechanically attaching the posts and the base to the conductive layer;

then

providing a conductive trace that includes a pad, a terminal and the signal post, wherein the pad includes a selected portion of the conductive layer and an electrically conductive path between the pad and the terminal includes the signal post;

mounting a semiconductor device on a heat spreader that includes the thermal post and the base, wherein the semiconductor device extends into a cavity in the thermal post that faces in the upward direction;

electrically connecting the semiconductor device to the pad, thereby electrically connecting the semiconductor device to the terminal; and

thermally connecting the semiconductor device to the thermal post, thereby thermally connecting the semiconductor device to the base.

47. The method of claim 46, wherein providing the thermal post, the signal post and the base includes:

providing a metal plate;

forming an etch mask on the metal plate that selectively exposes the metal plate and defines the posts;

etching the metal plate in a pattern defined by the etch mask, thereby forming a recess in the metal plate that extends into but not through the metal plate; and

then

removing the etch mask, wherein the thermal post includes a first unetched portion of the metal plate that protrudes above the base and is laterally surrounded by the recess, the signal post includes a second unetched portion of the metal plate that protrudes above the base and is laterally surrounded by the recess, and the base includes an unetched portion of the metal plate below the posts and the recess.

48. The method of claim 46, wherein:

providing the adhesive includes providing a prepreg with uncured epoxy;

flowing the adhesive includes melting the uncured epoxy and compressing the uncured epoxy between the base and the conductive layer; and

solidifying the adhesive includes curing the uncured epoxy.

49. The method of claim 46, wherein mounting the conductive layer includes mounting the conductive layer alone on the adhesive.

50. The method of claim 46, wherein mounting the conductive layer includes mounting the conductive layer and a dielectric layer on the adhesive.

51. The method of claim 46, wherein providing the pad includes removing selected portions of the conductive layer using an etch mask that defines the pad after solidifying the adhesive.

52. The method of claim 46, wherein providing the terminal includes removing selected portions of the base after solidifying the adhesive.

53. The method of claim 46, wherein providing the cavity includes etching a metal plate before solidifying the adhesive.

54. The method of claim 46, wherein providing the cavity includes etching the thermal post after solidifying the adhesive.

55. The method of claim 46, wherein mounting the semiconductor device includes providing a die attach between the semiconductor device and the thermal post, electrically connecting the semiconductor device includes providing a wire bond between the semiconductor device and the pad, and thermally connecting the semiconductor device includes providing the die attach between the semiconductor device and the thermal post.

56. A method of making a semiconductor chip assembly, comprising:

providing a thermal post, a signal post, a base, an adhesive and a substrate, wherein

the thermal post is adjacent to the base, extends above the base in an upward direction, extends through a first opening in the adhesive and extends into a first aperture in the substrate,

the signal post is adjacent to the base, extends above the base in the upward direction, extends through a second opening in the adhesive and extends into a second aperture in the substrate,

the base extends below the posts in a downward direction opposite the upward direction and extends laterally from the posts in lateral directions orthogonal to the upward and downward directions,

the adhesive is mounted on and extends above the base, is sandwiched between the base and the substrate and is non-solidified, and

the substrate is mounted on and extends above the adhesive, wherein the substrate includes a conductive layer and a dielectric layer and the conductive layer extends above the dielectric layer;

then

flowing the adhesive into and upward in a first gap located in the first aperture between the thermal post and the substrate and in a second gap located in the second aperture between the signal post and the substrate;

solidifying the adhesive;

then

providing a conductive trace that includes a pad, a terminal and the signal post, wherein the pad includes a selected portion of the conductive layer and an electrically conductive path between the pad and the terminal includes the signal post;

mounting a semiconductor device on the thermal post, wherein a heat spreader includes the thermal post and the base and the semiconductor device extends into a cavity in the thermal post that faces in the upward direction;

electrically connecting the semiconductor device to the pad, thereby electrically connecting the semiconductor device to the terminal; and

thermally connecting the semiconductor device to the thermal post, thereby thermally connecting the semiconductor device to the base.

57. The method of claim 56, wherein providing the thermal post, the signal post and the base includes:

providing a metal plate;

forming an etch mask on the metal plate that selectively exposes the metal plate and defines the posts;

etching the metal plate in a pattern defined by the etch mask, thereby forming a recess in the metal plate that extends into but not through the metal plate; and

then

removing the etch mask, wherein the thermal post includes a first unetched portion of the metal plate that protrudes above the base and is laterally surrounded by the recess, the signal post includes a second unetched portion of the metal plate that protrudes above the base and is laterally surrounded by the recess, and the base includes an unetched portion of the metal plate below the posts and the recess.

58. The method of claim 56, wherein:

providing the adhesive includes providing a prepreg with uncured epoxy;

flowing the adhesive includes melting the uncured epoxy and compressing the uncured epoxy between the base and the substrate; and

solidifying the adhesive includes curing the uncured epoxy.

59. The method of claim 56, wherein flowing the adhesive includes filling the gaps with the adhesive.

60. The method of claim 56, wherein providing the pad includes removing selected portions of the conductive layer after solidifying the adhesive.

61. The method of claim 56, wherein providing the pad includes:

grinding the posts, the adhesive and the conductive layer such that the posts, the adhesive and the conductive layer are laterally aligned with one another at a top lateral surface that faces in the upward direction; and

then

removing selected portions of the conductive layer using an etch mask that defines the pad.

62. The method of claim 56, wherein providing the terminal includes removing selected portions of the base after solidifying the adhesive.

63. The method of claim 56, wherein providing the terminal includes:

forming an etch mask after solidifying the adhesive and before mounting the semiconductor device;

etching the base in a pattern defined by the etch mask; and

then

removing the etch mask, wherein the terminal includes an unetched portion of the base that is adjacent to the signal post and is spaced and separated from and no longer part of the base.

64. The method of claim 56, wherein providing the cavity includes etching the thermal post after solidifying the adhesive.

65. The method of claim 56, wherein mounting the semiconductor device includes providing a die attach between the semiconductor device and the thermal post, electrically connecting the semiconductor device includes providing a wire bond between the semiconductor device and the pad, and thermally connecting the semiconductor device includes providing the die attach between the semiconductor device and the thermal post.

66. A method of making a semiconductor chip assembly, comprising:

providing a thermal post, a signal post and a base, wherein the thermal post is adjacent to and integral with the base and extends above the base in an upward direction, the signal post is adjacent to and integral with the base and extends above the base in the upward direction, and the base extends below the posts in a downward direction opposite the upward direction and extends laterally from the posts in lateral directions orthogonal to the upward and downward directions;

providing an adhesive, wherein first and second openings extend through the adhesive;

providing a substrate that includes a conductive layer and a dielectric layer, wherein first and second apertures extend through the substrate;

mounting the adhesive on the base, including inserting the thermal post into the first opening and the signal post into the second opening, wherein the adhesive extends above the base, the thermal post extends through the first opening and the signal post extends through the second opening;

mounting the substrate on the adhesive, including inserting the thermal post into the first aperture and the signal post into the second aperture, wherein the substrate extends above the adhesive, the conductive layer extends above the dielectric layer and the adhesive is sandwiched between the base and the substrate and is non-solidified;

then

applying heat to melt the adhesive;

moving the base and the substrate towards one another, thereby moving the thermal post upward in the first aperture, moving the signal post upward in the second aperture and applying pressure to the molten adhesive between the base and the substrate, wherein the pressure forces the molten adhesive to flow into and upward in a first gap located in the first aperture between the thermal post and the substrate and in a second gap located in the second aperture between the signal post and the substrate;

applying heat to solidify the molten adhesive, thereby mechanically attaching the posts and the base to the substrate;

then

providing a conductive trace that includes a pad, a terminal and the signal post, wherein the pad includes a selected portion of the conductive layer and an electrically conductive path between the pad and the terminal includes the signal post;

mounting a semiconductor device on a heat spreader that includes the thermal post and the base, wherein the semiconductor device extends into a cavity in the thermal post that faces in the upward direction;

electrically connecting the semiconductor device to the pad, thereby electrically connecting the semiconductor device to the terminal; and

thermally connecting the semiconductor device to the thermal post, thereby thermally connecting the semiconductor device to the base.

67. The method of claim 66, wherein providing the thermal post, the signal post and the base includes:

providing a metal plate;

forming an etch mask on the metal plate that selectively exposes the metal plate and defines the posts;

etching the metal plate in a pattern defined by the etch mask, thereby forming a recess in the metal plate that extends into but not through the metal plate; and

then

removing the etch mask, wherein the thermal post includes a first unetched portion of the metal plate that protrudes above the base and is laterally surrounded by the recess, the signal post includes a second unetched portion of the metal plate that protrudes above the base and is laterally surrounded by the recess, and the base includes an unetched portion of the metal plate below the posts and the recess.

68. The method of claim 66, wherein:

providing the adhesive includes providing a prepreg with uncured epoxy;

flowing the adhesive includes melting the uncured epoxy and compressing the uncured epoxy between the base and the substrate; and

solidifying the adhesive includes curing the uncured epoxy.

69. The method of claim 66, wherein providing the pad and the terminal includes:

grinding the posts, the adhesive and the conductive layer such that the posts, the adhesive and the conductive layer are laterally aligned with one another at a top lateral surface that faces in the upward direction;

then

removing selected portions of the conductive layer using a first etch mask that defines the pad, wherein the pad includes an unetched portion of the conductive layer; and

removing selected portions of the base using a second etch mask that defines the terminal, wherein the terminal includes an unetched portion of the base that is adjacent to the signal post and is spaced and separated from and no longer part of the base.

70. The method of claim 66, wherein mounting the semiconductor device includes providing a die attach between the semiconductor device and the thermal post, electrically connecting the semiconductor device includes providing a wire bond between the semiconductor device and the pad, and thermally connecting the semiconductor device includes providing the die attach between the semiconductor device and the thermal post.