SEMICONDUCTOR MEMORY DEVICE AND DATA PROCESSING METHOD THEREOF
First Claim
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1. A semiconductor memory device, comprising:
- an error correction code unit that performs error correction encoding for user data, and generates parity data; and
a memory unit that stores the user data and the parity data, wherein the error correction code unit generates the parity data, which comprises a number of bits equal to at least 2t, wherein t is a natural number, and the bits of the parity data distinguish free page data from user data that is equal to the free page data.
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Abstract
A semiconductor memory device is provided. The semiconductor memory device includes an error correction code block and a memory. The error correction code block performs error correction encoding for user data to generate parity data. The memory stores the user data and the parity data. The error correction code block generates parity data, including a number of bits equal to at least 2t, wherein t is a natural number, and the bits of the parity data distinguish free page data from user data that is equal to the free page data.
12 Citations
18 Claims
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1. A semiconductor memory device, comprising:
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an error correction code unit that performs error correction encoding for user data, and generates parity data; and a memory unit that stores the user data and the parity data, wherein the error correction code unit generates the parity data, which comprises a number of bits equal to at least 2t, wherein t is a natural number, and the bits of the parity data distinguish free page data from user data that is equal to the free page data. - View Dependent Claims (2, 3, 4, 5, 6)
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7. A data writing method of a semiconductor memory device, the data writing method comprising:
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performing error correction encoding for user data, and generating parity data; and storing the user data and the parity data, wherein the parity data comprises a number of bits equal to at least 2t, wherein t is a natural number, and the bits of the parity data distinguish free page data from user data that is equal to the free page data. - View Dependent Claims (8, 9, 10, 11, 12)
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13. A semiconductor memory system comprising:
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a semiconductor memory device; and a host device; wherein the semiconductor memory device comprises a memory controller and a memory unit; wherein the memory controller comprises an error correction code unit that performs error correction encoding for user data, and generates parity data, which comprises a number of bits equal to at least 2t, wherein t is a natural number, and the bits of the parity data distinguish free page data from user data that is equal to the free page data. - View Dependent Claims (14, 15, 16, 17, 18)
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Specification