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METHOD AND SYSTEM FOR ERROR CORRECTION IN FLASH MEMORY

  • US 20110060969A1
  • Filed: 11/15/2010
  • Published: 03/10/2011
  • Est. Priority Date: 01/20/2006
  • Status: Active Grant
First Claim
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1. A controller for a multi-level solid state non-volatile memory array having memory cells, the memory cells adapted to store data using a first number of digital levels, the controller configured to:

  • encode a series of data bits to generate a series of encoded data bits;

    convert the series of encoded data bits into a series of data symbols;

    send, to the memory array, a stored series of data symbols based on the series of data symbols for storage in a memory cell of the multi-level solid state non-volatile memory array;

    generate an output signal based on data associated with the stored series of data symbols, the output signal characterized by a second number of digital levels greater than the first number of digital levels used to store the series of data symbols in the memory cell; and

    output a series of output data symbols based on the output signal.

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