SEMICONDUCTOR DISPLAY DEVICE

• US 20110063262A1
• Filed: 09/13/2010
• Published: 03/17/2011
• Est. Priority Date: 09/16/2009
• Status: Active Grant

• Current Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Original Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Inventors: AKIBA, Mai, UMEZAKI, Atsushi
• Granted Patent: US 9,715,845 B2
• Time in Patent Office: Days
• US Class Current: 345/204
• CPC Class Codes: G09G 2300/08 Active matrix structure, i.e. with use of active elements, inclusive of non-linear two terminal elements, in the pixels together with light emitting or modulating elements
• CPC Class Codes: G09G 2300/0842 forming a memory circuit, e.g. a dynamic memory with one capacitor
• CPC Class Codes: G09G 2310/0267 Details of drivers for scan electrodes, other than drivers for liquid crystal, plasma or OLED displays
• CPC Class Codes: G09G 2310/027 Details of drivers for data electrodes, the drivers handling digital grey scale data, e.g. use of D/A converters
• CPC Class Codes: G09G 2310/0286 Details of a shift registers arranged for use in a driving circuit
• CPC Class Codes: G09G 2310/0297 Special arrangements with multiplexing or demultiplexing of display data in the drivers for data electrodes, in a pre-processing circuitry delivering display data to said drivers or in the matrix panel, e.g. multiplexing plural data signals to one D/A converter or demultiplexing the D/A converter output to multiple columns
• CPC Class Codes: G09G 2310/04 Partial updating of the display screen
• CPC Class Codes: G09G 2330/021 Power management, e.g. power saving
• CPC Class Codes: G09G 3/20 for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
• CPC Class Codes: G09G 3/3225 using an active matrix
• CPC Class Codes: G11C 19/28 using semiconductor elements G11C19/14, G11C19/36 take precedence
• CPC Class Codes: H01L 27/1225 with semiconductor materials not belonging to the group IV of the periodic table, e.g. InGaZnO

Abstract

It is an object to provide a semiconductor display device with high reliability. Further, it is an object to provide a semiconductor display device which can reduce power consumption. A decoder is provided for a scan line driver circuit and operates such that, in accordance with a signal input to the scan line driver circuit, a pulse is sequentially input only to scan lines included in pixels of rows performing display and a pulse is not input to scan lines included in pixels of rows at which display is not performed. Then, all pixels or part of pixels in the line selected by the pulse is supplied with a video signal from a signal line driver circuit, whereby display of an image is performed in pixels arranged in the specific area of the pixel portion.

Claims

1. A semiconductor display device comprising:

a pixel portion including a plurality of pixels each including a transistor and a display element; and

a scan line driver circuit including a decoder outputting a selection signal,

wherein switching of the transistor is controlled by the selection signal,

wherein an operation of the display element is controlled in accordance with a first video signal having an image date or a second selection signal not contributing to display of an image, and

wherein the transistor includes an oxide semiconductor for a channel formation region.

2. The semiconductor display device according to claim 1, wherein the scan line driver circuit includes a second transistor, and a channel formation region of the second transistor includes an oxide semiconductor.

3. The semiconductor display device according to claim 1, wherein the decoder includes 2ⁿ NOR circuits and n bits of a control signal is input to each of the 2ⁿ NOR circuits.

4. A semiconductor display device comprising:

a pixel portion including a plurality of pixels each including a transistor and a display element;

a scan line driver circuit including a decoder outputting a selection signal, and

a signal line driver circuit putting a first video signal having an image date and a second selection signal not contributing to display of an image,

wherein switching of the transistor is controlled by the selection signal,

wherein an operation of the display element in a pixel being on included in the plurality of pixels is controlled in accordance with the first video signal or the second selection signal, and

wherein the transistor includes an oxide semiconductor for a channel formation region.

5. The semiconductor display device according to claim 4, wherein the scan line driver circuit includes a second transistor, and a channel formation region of the second transistor includes an oxide semiconductor.

6. The semiconductor display device according to claim 4, wherein the signal line driver circuit includes a third transistor, and a channel formation region of the third transistor includes an oxide semiconductor.

7. The semiconductor display device according to claim 4, wherein an output portion of the signal line driver circuit includes a fourth transistor, and a channel formation region of the fourth transistor includes an oxide semiconductor.

8. The semiconductor display device according to claim 4, wherein the decoder includes 2ⁿ NOR circuits and n bits of a control signal is input to each of the 2ⁿ NOR circuits.