Semiconductor Device

• US 20110063803A1
• Filed: 09/16/2010
• Published: 03/17/2011
• Est. Priority Date: 09/17/2009
• Status: Active Grant

• Current Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Original Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Inventors: KAMATA, Koichiro, TUJI, Takahiro
• Granted Patent: US 8,368,209 B2
• Time in Patent Office: Days
• US Class Current: 361/728
• CPC Class Codes: G06K 19/07735 the record carrier comprising means for protecting against electrostatic discharge
• CPC Class Codes: G06K 19/07749 the record carrier being capable of non-contact communication, e.g. constructional details of the antenna of a non-contact smart card

Abstract

The problem of damage on an antenna or a circuit (electrostatic breakdown) due to discharge of electric charge accumulated in an insulator is solved; and the problem of NAKANUKE failure is solved. A pair of conductive layers, a pair of insulators provided between the pair of conductive layers, and a chip which is provided between the pair of insulators and includes an antenna, an analog circuit, and a digital circuit are provided, in which an opening is provided for at least one of the pair of conductive layers, and the opening is provided at a position which overlaps at least the analog circuit.

Claims

1. A semiconductor device comprising:

a pair of conductive layers;

a pair of insulators provided between the pair of conductive layers; and

a chip which is provided between the pair of insulators and comprises an antenna, an analog circuit, and a digital circuit,

wherein an opening is provided for at least one of the pair of conductive layers, and

wherein the opening is provided at a position which overlaps the analog circuit.

2. The semiconductor device according to claim 1, wherein the position further overlaps the digital circuit.

3. The semiconductor device according to claim 1, wherein the position further overlaps the antenna and the digital circuit.

4. The semiconductor device according to claim 1, wherein the pair of conductive layers be electrically connected to each other.

5. A semiconductor device comprising:

a pair of insulators;

a pair of conductive layers provided between the pair of insulators; and

a chip which is provided between the pair of conductive layers and comprises an antenna, an analog circuit, and a digital circuit,

wherein an opening is provided for at least one of the pair of conductive layers, and

wherein the opening is provided at a position which overlaps the analog circuit.

6. The semiconductor device according to claim 5, wherein the position further overlaps the digital circuit.

7. The semiconductor device according to claim 5, wherein the position further overlaps the antenna and the digital circuit.

8. The semiconductor device according to claims 5, wherein the pair of conductive layers be electrically connected to each other.

9. A semiconductor device comprising:

a pair of conductive layers;

a pair of insulators provided between the pair of conductive layers; and

a chip which is provided between the pair of insulators and comprises an antenna, an analog circuit, and a digital circuit,

wherein the analog circuit comprises at least a regulator circuit,

wherein an opening is provided for at least one of the pair of conductive layers, and

wherein the opening is provided at a position which overlaps the regulator circuit.

10. The semiconductor device according to claim 9, wherein the pair of conductive layers be electrically connected to each other.

11. A semiconductor device comprising:

a pair of insulators;

a pair of conductive layers provided between the pair of insulators; and

a chip which is provided between the pair of conductive layers and comprises an antenna, an analog circuit, and a digital circuit,

wherein the analog circuit comprises at least a regulator circuit,

wherein an opening is provided for at least one of the pair of conductive layers, and

wherein the opening is provided at a position which overlaps the regulator circuit.

12. The semiconductor device according to claim 11, wherein the pair of conductive layers be electrically connected to each other.