DISPLAY DEVICE
First Claim
1. A display device comprising:
- a driver circuit including a logic circuit, the logic circuit including a first transistor which is a depletion type transistor and a second transistor which is an enhancement type transistor;
a signal line;
a pixel portion including a pixel whose display state is configured to be controlled by input of a signal including image data from the driver circuit through the signal line; and
a third transistor which is a depletion type transistor and includes a gate, a source, and a drain,wherein one of the source and the drain of the third transistor is configured to be supplied with a reference voltage,wherein the other of the source and the drain of the third transistor is electrically connected to the signal line, andwherein the gate of the third transistor is configured to be supplied with a gate signal,wherein the first to third transistors each include an oxide semiconductor layer including a channel formation region.
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Accused Products
Abstract
A display device includes a driver circuit including a logic circuit including a first transistor which is a depletion type transistor and a second transistor which is an enhancement type transistor; a signal line which is electrically connected to the driver circuit; a pixel portion including a pixel whose display state is controlled by input of a signal including image data from the driver circuit through the signal line; a reference voltage line to which reference voltage is applied; and a third transistor which is a depletion type transistor and controls electrical connection between the signal line and the reference voltage line. The first to the third transistors each include an oxide semiconductor layer including a channel formation region.
124 Citations
6 Claims
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1. A display device comprising:
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a driver circuit including a logic circuit, the logic circuit including a first transistor which is a depletion type transistor and a second transistor which is an enhancement type transistor; a signal line; a pixel portion including a pixel whose display state is configured to be controlled by input of a signal including image data from the driver circuit through the signal line; and a third transistor which is a depletion type transistor and includes a gate, a source, and a drain, wherein one of the source and the drain of the third transistor is configured to be supplied with a reference voltage, wherein the other of the source and the drain of the third transistor is electrically connected to the signal line, and wherein the gate of the third transistor is configured to be supplied with a gate signal, wherein the first to third transistors each include an oxide semiconductor layer including a channel formation region. - View Dependent Claims (2)
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3. A display device comprising:
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a driver circuit including a logic circuit, the logic circuit including a first transistor which is a depletion type transistor and a second transistor which is an enhancement type transistor; a signal line; a pixel portion including a pixel whose display state is configured to be controlled by input of a signal including image data from the driver circuit through the signal line; and a third transistor which is a depletion type transistor and includes a gate, a source, and a drain, wherein one of the source and the drain of the third transistor is configured to be supplied with a reference voltage, wherein the other of the source and the drain of the third transistor is electrically connected to the signal line, and wherein the gate of the third transistor is configured to be supplied with a gate signal, wherein the first to third transistors each include an oxide semiconductor layer including a channel formation region, wherein a thickness of the oxide semiconductor layer in the first transistor is larger than a thickness of the oxide semiconductor layer in the second transistor, and wherein a thickness of the oxide semiconductor layer in the third transistor is larger than a thickness of the oxide semiconductor layer in the second transistor. - View Dependent Claims (4)
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5. A display device comprising:
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a driver circuit including a logic circuit, the logic circuit including a first transistor which is a depletion type transistor and a second transistor which is an enhancement type transistor; a signal line; a pixel portion including a pixel whose display state is configured to be controlled by input of a signal including image data from the driver circuit through the signal line; and a third transistor which is a depletion type transistor and includes a gate, a source, and a drain, wherein one of the source and the drain of the third transistor is configured to be supplied with a reference voltage, wherein the other of the source and the drain of the third transistor is electrically connected to the signal line, and wherein the gate of the third transistor is configured to be supplied with a gate signal, wherein the first to third transistors each include a first gate electrode, a second gate electrode, and an oxide semiconductor layer including a channel formation region between the first gate electrode and the second gate electrode.
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6. A display device comprising:
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a signal line; a pixel portion including a pixel, the pixel including a first transistor which is an enhancement type transistor and includes a gate, a source, and a drain; wherein one of the source and the drain of the first transistor is electrically connected to the signal line, a second transistor which is a depletion type transistor and includes a gate, a source, and a drain, wherein one of the source and the drain of the second transistor is configured to be supplied with a reference voltage, wherein the other of the source and the drain of the second transistor is electrically connected to the signal line, wherein the gate of the second transistor is configured to be supplied with a gate signal, and wherein the first transistor and the second transistor each include an oxide semiconductor layer including a channel formation region.
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Specification