ELECTRONIC DEVICE AND METHOD OF MANUFACTURING AN ELECTRONIC DEVICE

• US 20110073357A1
• Filed: 05/13/2009
• Published: 03/31/2011
• Est. Priority Date: 06/02/2008
• Status: Abandoned Application

• Current Assignee: NXP B.V. (NXP Semiconductors NV)
• Original Assignee: NXP B.V. (NXP Semiconductors NV)
• Inventors: Zenz, Christian
• Application Number:
  US12/995,848
• Publication Number:
  US 20110073357A1
• Time in Patent Office: Days
• US Class Current: 174/257
• CPC Class Codes: G06K 19/07749 the record carrier being capable of non-contact communication, e.g. constructional details of the antenna of a non-contact smart card
• CPC Class Codes: H01L 2223/6677 for antenna, e.g. antenna included within housing of semiconductor device antennas per se H01Q
• CPC Class Codes: H01L 2224/04105 Bonding areas formed on an encapsulation of the semiconductor or solid-state body, e.g. bonding areas on chip-scale packages
• CPC Class Codes: H01L 2224/18 High density interconnect [HDI] connectors; Manufacturing methods related thereto
• CPC Class Codes: H01L 2224/32145 the bodies being stacked
• CPC Class Codes: H01L 2224/32225 the item being non-metallic, e.g. insulating substrate with or without metallisation
• CPC Class Codes: H01L 2224/32245 the item being metallic
• CPC Class Codes: H01L 2224/73267 Layer and HDI connectors
• CPC Class Codes: H01L 2224/82039 using a laser
• CPC Class Codes: H01L 2224/82047 by mechanical means, e.g. severing, pressing, stamping
• CPC Class Codes: H01L 2224/92244 the second connecting process involving a build-up interconnect
• CPC Class Codes: H01L 23/49855 for flat-cards, e.g. credit cards cards per se G06K19/00
• CPC Class Codes: H01L 23/5389 the chips being integrally enclosed by the interconnect and support structures
• CPC Class Codes: H01L 24/18 High density interconnect [HDI] connectors; Manufacturing methods related thereto interconnection structure between a plurality of semiconductor chips H01L23/5389
• CPC Class Codes: H01L 24/24 of an individual high density interconnect connector
• CPC Class Codes: H01L 24/82 by forming build-up interconnects at chip-level, e.g. for high density interconnects [HDI] interconnection structure between a plurality of semiconductor chips H01L23/5389
• CPC Class Codes: H01L 2924/01023 Vanadium [V]
• CPC Class Codes: H01L 2924/01033 Arsenic [As]
• CPC Class Codes: H01L 2924/01082 Lead [Pb]
• CPC Class Codes: H01L 2924/014 Solder alloys
• CPC Class Codes: H01L 2924/14 : Integrated circuits
• CPC Class Codes: Y10T 29/49126 : Assembling bases

Abstract

Electronic device comprising an integrated circuit (1) embedded into a substrate, wherein the substrate has at least a first (3) and a second (9) conductive structure arranged on opposite sides of the integrated circuit (1) and the electrical connections (10,11,12,13) between the first (3) and the second (9) conductive structure and/or with the integrated circuit 5 (1) are established by means of holes (8) in the substrate.

Claims

1. Electronic device comprising an integrated circuit embedded into a substrate, wherein the substrate has at least a first and a second conductive structure arranged on opposite sides of the integrated circuit (1) and the electrical connections between the first and the second conductive structure and/or with the integrated circuit are established by means of holes in the substrate.

2. Electronic device according to claim 1, wherein the first conductive structure forms a conductive bridge between two regions of the second conductive structure.

3. Electronic device according to claim 1, wherein the integrated circuit is arranged between two layers of the substrate, the second conductive structure being arranged on a surface of at least one substrate layer facing away from the integrated circuit and the first conductive structure being arranged on a surface of at least one substrate layer facing the integrated circuit.

4. Electronic device according to claim 1, wherein the first conductive structure is designed as a conductive layer separated from the integrated circuit by an insulating layer.

5. Electronic device according to claim 4, wherein the conductive layer is arranged on a polymer carrier.

6. Electronic device according to claim 1, wherein the second conductive structure is made of conductive ink and the electrical connections between the first and the second conductive structure and/or with the integrated circuit are established by means of conductive ink filling the holes in the substrate.

7. Electronic device according to claim 1, arranged as an inlay for smart cards.

8. Method of manufacturing an electronic device, comprising:

arranging an integrated circuit (1) on a layer (6) having a first conductive structure,

embedding the integrated circuit into a substrate,

forming holes in the substrate,

forming a second conductive structure on a surface of the substrate, said surface being on a side of the integrated circuit opposite to the first conductive structure,

electrically connecting the second conductive structure to the first conductive structure and/or to the integrated circuit by means of the holes.

9. Method according to claim 8, wherein forming the second conductive structure and connecting the second conductive structure are performed in a single process step.

10. Method according to claim 8, wherein forming said second conductive structure comprises printing said structure with a conductive ink and during said printing filling said holes with ink thereby connecting the second conductive structure with the first conductive structure and/or with the integrated circuit.

11. Method according to claim 8, wherein embedding comprises laminating the integrated circuit between two layers of the substrate.

12. Method according to claim 8, wherein arranging the integrated circuit on the layer having the first conductive structure comprises interposing an insulative layer between the integrated circuit and the first conductive structure.

13. Method according to claim 8, wherein the second conductive structure forms an antenna for RFID applications.