Signal Acquisition System Having a Compensation Digital Filter

• US 20110074391A1
• Filed: 07/29/2010
• Published: 03/31/2011
• Est. Priority Date: 09/30/2009
• Status: Active Grant

• Current Assignee: Tektronix Incorporated (Fortive Corp.)
• Original Assignee: Tektronix Incorporated (Fortive Corp.)
• Inventors: Stevens, Michael Duane, Bartlett, Josiah A., Larson, Lester L., Knierim, Daniel G., Jansen, Scott R., Pollock, Ira G., Dobyns, Kenneth P.
• Granted Patent: US 8,278,940 B2
• Time in Patent Office: Days
• US Class Current: 324/76.44
• CPC Class Codes: G01R 1/06766 Input circuits therefor
• CPC Class Codes: G01R 1/06772 High frequency probes

Abstract

A signal acquisition system has a signal acquisition probe having probe tip circuitry coupled to a resistive center conductor signal cable. The resistive center conductor signal cable is coupled to a compensation system in a signal processing instrument via an input node and input circuitry in the signal processing instrument. The signal acquisition probe and the signal processing instrument have mismatched time constants at the input node with the compensation system having an input amplifier with feedback loop circuitry and a compensation digital filter providing pole-zero pairs for maintaining flatness over the signal acquisition system frequency bandwidth.

Claims

1. A signal acquisition system having a compensation digital filter comprising:

a signal acquisition probe having probe tip circuitry coupled to a resistive center conductor signal cable;

a signal processing instrument having an input node coupled to the resistive center conductor signal cable of the signal acquisition probe and coupled to a compensation system disposed in the signal processing instrument via input circuitry; and

wherein the signal acquisition probe and the signal processing instrument have mismatched time constants at the input node with the compensation system having an input amplifier with feedback loop circuitry and a compensation digital filter providing pole-zero pairs for maintaining flatness over the signal acquisition system frequency bandwidth.

2. The signal acquisition system as recited in claim 1 wherein the input circuitry of the signal processing instrument provides at least one of resistive and capacitive termination of the resistive center conductor signal cable.

3. The signal acquisition system having a compensation digital filter as recited in claim 1 wherein the feedback loop circuitry is coupled between an input and an output of the input amplifier.

4. The signal acquisition system as recited in claim 3 wherein the signal processing instrument further comprises a signal path with one end of the signal path coupled to the input node and the other end coupled to a resistive element disposed adjacent to the input of the input amplifier forming a terminated transmission line.

5. The signal acquisition system having a compensation digital filter as recited in claim 1 wherein the input amplifier comprises a current amplifier.

6. The signal acquisition system as recited in claim 3 wherein the feedback loop circuitry comprises resistive elements and capacitive elements.

7. The signal acquisition system having a compensation digital filter as recited in claim 6 wherein the feedback loop circuitry of the input amplifier further comprises a plurality of registers for setting resistive values and capacitive values of respective resistive and capacitive elements in the feedback loop circuitry.

8. The signal acquisition system having a compensation digital filter as recited in claim 1 wherein the compensation digital filter further comprises a plurality of filter taps where the values of the filter taps are varied.

9. The signal acquisition system as recited in claim 1 wherein the input circuitry further comprises attenuator circuitry.

10. The signal acquisition system having a compensation digital filter as recited in claim 9 further comprising a switching circuit disposed in the signal processing instrument for selectively coupling the input node of the signal processing instrument to the compensation system via the attenuator circuitry and for selectively coupling additional attenuation circuitry between the input node of the signal processing instrument and the attenuation circuitry.

11. The signal acquisition system having a compensation digital filter as recited in claim 1 wherein the probe tip circuitry further comprises at least a first resistive element in parallel with a capacitive element.

12. The signal acquisition system as recited in claim 11 wherein the capacitive element has a capacitance in the range of 2 to 5 picofarads.

13. A calibration process for a signal acquisition system having a compensation digital filter wherein the acquisition system has a signal acquisition probe coupled to a signal processing instrument via a signal cable comprising the steps of:

a) acquiring digital values of a broad frequency content signal as a calibration waveform using the signal acquisition probe and the signal processing instrument;

b) determining at least a first measured error value between a broad frequency content signal reference calibration waveform stored in the signal processing instrument and the calibration waveform at a common location on the waveforms set by at least one of a time location and a frequency location;

c) determining measured error factor having at least one of a register value and a filter tap value as a function of at least the first measured error value and the common location on the waveforms;

d) applying measured error factor to at least one of a respective register value of an appropriate register in a plurality of registers in feedback loop circuitry of an input amplifier and a filter tap value in a plurality of taps in the compensation digital filter;

e) repeating steps b), c), and d) for additional common locations on the waveforms;

f) acquiring digital values of a broad frequency content signal as a calibration waveform using the signal acquisition probe and the signal processing instrument after determining the measured error value and measured error factor at the last common location on the waveform;

g) comparing calibration specifications with the calibration waveform acquired in step f) to verify the calibration waveform is within calibration specifications;

h) storing register values loaded in the plurality of registers in at least one of the feedback loop circuitry of the input amplifier and filter taps of the compensation digital filter for the calibration waveform within calibration specifications; and

i) displaying successful result of the calibration process.

14. The calibration process for a signal acquisition system having a compensation digital filter as recited in claim 13 wherein the determining steps b) and c) further comprises the steps of:

a) determining a plurality of first measured error value between a broad frequency content signal reference calibration waveform stored in the signal processing instrument and the calibration waveform at a common locations on the waveforms set by at least one of time locations and a frequency locations; and

b) determining a measured error factor having at least one of a register value and a filter tap value as a function of the plurality of first measured error values and the common locations on the waveforms.

15. The calibration process for a signal acquisition system having a compensation digital filter as recited in claim 13 wherein the verifying step further comprises the steps of:

a) determining if the calibration process has exceeded an iteration time limit value;

b) setting the common location on the waveforms to the initial location when the calibration process has not exceeded the iteration time limit value;

c) repeating step e) of claim 13 for the common locations on the waveforms.

16. The calibration process for a signal acquisition system having a compensation digital filter as recited in claim 15 wherein the verifying step further comprises the steps of:

a) determining if the calibration process has exceeded a iteration time limit value;

b) storing initial register values in the plurality of registers in the feedback loop circuitry of the input amplifier and initial filter tap values of the compensation digital filter prior to the start of the calibration process when the calibration process exceeds the iteration time limit value; and

c) displaying unsuccessful result of the calibration process.

17. The calibration process for a signal acquisition system having a compensation digital filter as recited in claim 13 wherein the acquiring step of step a) of claim 13 further comprises the steps of:

a) attaching the signal acquisition probe to the signal processing instrument;

b) detecting at least one of the presence or absence of a probe memory in the signal acquisition probe by the signal processing instrument;

c) loading stored contents of probe memory into the signal processing instrument when the probe memory is present;

d) detecting probe calibration constants stored in the probe memory;

e) applying the probe calibration constants to appropriate register values in the plurality of registers in at least one of the feedback loop circuitry of the input amplifier and appropriate filter tap values in the plurality of taps in the compensation digital filter; and

f) identifying the signal acquisition probe as not having a probe memory when the probe memory is absent.

18. The calibration process for a signal acquisition system having a compensation digital filter as recited in claim 13 wherein the determining step of step b) in claim 13 further comprises the steps of:

a) converting the digital values of a broad frequency content signal calibration waveform to a frequency domain representation using a Fourier Transform;

b) determining a measured error value between a frequency domain representation of a broad frequency content signal reference calibration waveform stored in the signal processing instrument and the frequency domain representation of the calibration waveform at a common location on the waveforms set by a frequency interval.