MAINTAINING INTEGRITY OF PRELOADED CONTENT IN NON-VOLATILE MEMORY DURING SURFACE MOUNTING
First Claim
1. A method for preparing a non-volatile memory chip package for surface mounting to a substrate in a surface mounting process which heats the non-volatile memory chip package, the non-volatile memory chip package comprises at least one die, the at least one die comprises a plurality of blocks of non-volatile storage elements, the method comprising:
- preloading at least one block of the plurality of blocks with data;
identifying at least one block of the plurality of blocks which is not preloaded with data; and
responsive to the identifying, raising threshold voltages of non-volatile storage elements of the at least one block which is not preloaded with data, from an initial level to higher levels.
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Accused Products
Abstract
A non-volatile memory chip package is prepared for surface mounting to a substrate in a solder reflow process by programming erased blocks to higher threshold voltage levels, to improve data retention for blocks which are preloaded with content, such as by an electronic device manufacturer. Following the surface mounting, the previously-erased blocks are returned to the erased state. The threshold voltage of storage elements of the preloaded blocks can change during the surface mounting process due to a global charge effect phenomenon. The effect is most prominent for higher state storage elements which are surrounded by erased blocks, in a chip for which the wafer backside was thinned and polished. The erased blocks can be programmed using a single program pulse without performing a verify operation, as a wide threshold voltage distribution is acceptable.
82 Citations
20 Claims
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1. A method for preparing a non-volatile memory chip package for surface mounting to a substrate in a surface mounting process which heats the non-volatile memory chip package, the non-volatile memory chip package comprises at least one die, the at least one die comprises a plurality of blocks of non-volatile storage elements, the method comprising:
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preloading at least one block of the plurality of blocks with data; identifying at least one block of the plurality of blocks which is not preloaded with data; and responsive to the identifying, raising threshold voltages of non-volatile storage elements of the at least one block which is not preloaded with data, from an initial level to higher levels. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8)
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9. At least one processor readable storage device having processor readable code embodied thereon for programming one or more processors to perform a computer implemented method for preparing a non-volatile memory chip package for surface mounting to a substrate in a surface mounting process which heats the non-volatile memory chip package, the non-volatile memory chip package comprises at least one die, the at least one die comprises a plurality of blocks of non-volatile storage elements, the method comprising:
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preloading at least one block of the plurality of blocks with data; identifying at least one block of the plurality of blocks which is not preloaded with data; and responsive to the identifying, raising threshold voltages of non-volatile storage elements of the at least one block which is not preloaded with data from an initial level to higher levels. - View Dependent Claims (10, 11, 12, 13, 14, 15)
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16. A method for preparing a non-volatile memory chip package for surface mounting to a substrate in a surface mounting process which heats the non-volatile memory chip package, the non-volatile memory chip package comprises a plurality of die, each die comprises a plurality of blocks of non-volatile storage elements, the method comprising:
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programming at least one block of at least one die of the plurality of die with data; identifying at least one block of the at least one die which is not programmed with data, and which is in an erased state; identifying at least one other die of the plurality of die which is not programmed with data, and which has blocks in the erased state; and raising threshold voltages of non-volatile storage elements of the at least one block which is not programmed with data above the erased state, where the blocks in the erased state of the at least one other die which is not programmed with data are kept in the erased state. - View Dependent Claims (17, 18, 19, 20)
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Specification