METHOD OF MAKING A VERTICALLY STRUCTURED LIGHT EMITTING DIODE

• US 20110076794A1
• Filed: 08/31/2010
• Published: 03/31/2011
• Est. Priority Date: 09/29/2009
• Status: Abandoned Application

• Current Assignee: Ubilux Optoelectronics Corporation
• Original Assignee: Ubilux Optoelectronics Corporation
• Inventors: Chen, Hung-Jen, Lo, Ming-Cheng, Su, Juh-Yuh
• Application Number:
  US12/872,560
• Publication Number:
  US 20110076794A1
• Time in Patent Office: Days
• US Class Current: 438/47
• CPC Class Codes: H01L 33/0093 Wafer bonding; Removal of the growth substrate
• CPC Class Codes: H01L 33/0095 Post-treatment of devices, e.g. annealing, recrystallisation or short-circuit elimination

Abstract

A method of making a vertically structured light emitting diode includes: providing a sacrificial substrate having first and second portions; forming a first buffer layer on a surface of the sacrificial substrate; forming a second buffer layer on a surface of the first buffer layer; forming a light emitting unit on a surface of the second buffer layer; forming a device substrate on a surface of the light emitting unit; etching the first portion of the sacrificial substrate such that the second portion of the sacrificial substrate remains on the first buffer layer; dry-etching the second portion of the sacrificial substrate; dry-etching the first buffer layer; and etching the second buffer layer. An etch rate of a material of the second buffer layer is lower than an etch rate of a material of the first buffer layer.

Claims

1. A method of making a vertically structured light emitting diode, comprising:

providing a sacrificial substrate having a first portion and a second portion;

forming a first buffer layer on a surface of the sacrificial substrate so that the second portion of the sacrificial substrate is disposed between the first portion of the sacrificial substrate and the first buffer layer;

forming a second buffer layer on a surface of the first buffer layer opposite to the sacrificial substrate;

forming a light emitting unit on a surface of the second buffer layer opposite to the first buffer layer;

forming a device substrate on a surface of the light emitting unit opposite to the second buffer layer;

etching the first portion of the sacrificial substrate such that the second portion of the sacrificial substrate remains on the first buffer layer;

dry-etching the second portion of the sacrificial substrate;

dry-etching the first buffer layer; and

etching the second buffer layer,

wherein an etch rate of a material of the second buffer layer is lower than an etch rate of a material of the first buffer layer.

2. The method of claim 1, wherein the first portion of the sacrificial substrate is etched through a chemical-mechanical polishing process.

3. The method of claim 1, wherein the second portion of the sacrificial substrate is dry-etched through an inductively coupled plasma etching process.

4. The method of claim 3, wherein the inductively coupled plasma etching process employs a reactant gas selected from the group consisting of chlorine, boron trichloride, carbon tetrafluoride, trifluoromethane, sulfur hexafluoride, and oxygen.

5. The method of claim 1, wherein the first buffer layer is dry-etched through an inductively coupled plasma etching process.

6. The method of claim 5, wherein the inductively coupled plasma etching process employs a reactant gas selected from the group consisting of chlorine, boron trichloride, carbon tetrafluoride, trifluoromethane, sulfur hexafluoride, and oxygen.

7. The method of claim 1, wherein the second buffer layer is etched through an inductively coupled plasma etching process.

8. The method of claim 7, wherein the inductively coupled plasma etching process employs a reactant gas selected from the group consisting of chlorine, boron trichloride, carbon tetrafluoride, trifluoromethane, sulfur hexafluoride, and oxygen.

9. The method of claim 1, wherein the etch rates of the materials of the first and second buffer layers have the following relation:

y≧

1.5x

where the etch rate of the material of the first buffer layer is y, and the etch rate of the material of the second buffer layer is x.

10. The method of claim 1, wherein an etch rate of a material of the second portion of the sacrificial substrate and the etch rate of the material of the first buffer layer have the following relation:

z≧

1.5y

where the etch rate of the material of the second portion of the sacrificial substrate is z, and the etch rate of the material of the first buffer layer is y.

11. The method of claim 1, wherein the sacrificial substrate is a sapphire substrate.

12. The method of claim 1, wherein the first buffer layer includes undoped GaN.

13. The method of claim 1, wherein the second buffer layer includes Al_xGa_(1-x)N.

14. The method of claim 1, wherein the second buffer layer includes In_xGa_(1-x)N.

15. The method of claim 2, wherein each of the second portion of the sacrificial substrate, the first buffer layer, and the second buffer layer is dry-etched through an inductively coupled plasma etching process.

16. The method of claim 15, wherein the sacrificial substrate is a sapphire substrate, the first buffer layer includes undoped GaN, and the second buffer layer includes one of Al_xGa_(1-x)N and In_xGa_(1-x)N.