RETRIEVING BOOT INSTRUCTIONS FROM NONVOLATILE MEMORY

• US 20110078432A1
• Filed: 12/06/2010
• Published: 03/31/2011
• Est. Priority Date: 04/10/2006
• Status: Active Grant

• Current Assignee: Apple Inc.
• Original Assignee: Apple Inc.
• Inventors: Wu, Stephen
• Granted Patent: US 8,533,448 B2
• Time in Patent Office: Days
• US Class Current: 713/2
• CPC Class Codes: G06F 1/24 Resetting means
• CPC Class Codes: G06F 12/0246 in block erasable memory, e.g. flash memory
• CPC Class Codes: G06F 2212/7201 Logical to physical mapping or translation of blocks or pages
• CPC Class Codes: G06F 9/4401 Bootstrapping security arrangements therefor G06F21/57
• CPC Class Codes: G06F 9/4403 Processor initialisation
• CPC Class Codes: G06F 9/4406 Loading of operating system
• CPC Class Codes: G06F 9/44573 Execute-in-place [XIP]

Abstract

Systems and processes for booting a device can be implemented by detecting a reset signal associated with the device and retrieving a predetermined page of data from a nonvolatile memory location into a register associated with the nonvolatile memory. The nonvolatile memory may be designed and implemented such that each page of data is retrieved from the nonvolatile memory as a unit, and the page of data includes instructions for use in booting the device. A command to read data stored in the register is received, and the command can include an address identifying a location of one or more instructions within the register. In response, the one or more instructions are retrieved from the register for execution by a processor.

Claims

1. A method for booting a device, the method comprising:

detecting a reset signal associated with the device;

retrieving a predetermined page of data from a location in nonvolatile memory location, wherein each page of data is retrieved from the nonvolatile memory as a unit and the page of data includes at least one instruction for booting the device;

loading the predetermined page including the at least one booting instruction into a register associated with the nonvolatile memory;

receiving a command to read data stored in the register, wherein the command includes an address identifying a location within the register of the at least one booting instruction;

directly retrieving the at least one instruction from the register for execution by a processor; and

retrieving subsequent booting instructions from a Random Access Memory (RAM) of the device for executing an operating system and software applications.

2. The method of claim 1, the nonvolatile memory comprises a NAND flash memory.

3. The method of claim 1, wherein retrieving a predetermined page of data is performed automatically in response to detecting the reset signal.

4. The method of claim 1, further comprising receiving a plurality of commands to read data stored in the register, wherein the data read in response to the plurality of commands comprises code for loading separate boot loader code to a random access memory associated with the processor.

5. The method of claim 4, wherein the separate boot loader code is adapted for loading operating system or application code from the nonvolatile memory to the random access memory.

6. The method of claim 1, wherein the nonvolatile memory is adapted to enable random access to any byte in the register in response to a command to read data stored in the register.

7. The method of claim 1, further comprising converting an instruction fetch command from the processor into at least one command to read data stored in the register.

8. An article comprising a machine-readable, non-transitory medium storing instructions for causing data processing apparatus to perform operations comprising:

detecting a reset signal associated with the device;

retrieving a predetermined page of data from a location in nonvolatile memory location, wherein each page of data is retrieved from the nonvolatile memory as a unit and the page of data includes at least one instruction for booting the device;

loading the predetermined page including the at least one booting instruction into a register associated with the nonvolatile memory;

receiving a command to read data stored in the register, wherein the command includes an address identifying a location within the register of the at least one booting instruction;

directly retrieving the at least one instruction from the register for execution by a processor; and

retrieving subsequent booting instructions from a Random Access Memory (RAM) of the device for executing an operating system and software applications.

9. The article of claim 8, wherein the nonvolatile memory comprises a NAND flash memory.

10. The article of claim 8, wherein retrieving a predetermined page of data is performed automatically in response to detecting the reset signal.

11. The article of claim 8, the instructions for causing data processing apparatus to perform operations further comprising receiving a plurality of commands to read data stored in the register, wherein the data read in response to the plurality of commands comprises code for loading separate boot loader code to a random access memory associated with the processor.

12. The article of claim 11, wherein the separate boot loader code is adapted for loading operating system or application code from the nonvolatile memory to the random access memory.

13. The article of claim 8, wherein the nonvolatile memory is adapted to enable random access to any byte in the register in response to a command to read data stored in the register.

14. The article of claim 8, the instructions for causing data processing apparatus to perform operations further comprising converting an instruction fetch command from the processor into at least one command to read data stored in the register.

15. A nonvolatile memory comprising:

a first plurality of memory locations grouped into pages, wherein each page of data includes a second plurality of memory locations, the second plurality being fewer in number than the first plurality, and data in the memory locations being accessible by retrieving each page as a whole;

a register; and

a controller adapted to retrieve a predetermined page of data into the register in response to a predetermined condition and adapted to respond to certain received commands by retrieving data at an address within the register.

16. The nonvolatile memory of claim 15, wherein the predetermined condition comprises receiving a reset signal.

17. The nonvolatile memory of claim 15, wherein the certain received commands are received from a processor and include an indication of the address within the register.

18. The nonvolatile memory of claim 15, wherein the retrieved data is sent to a processor for execution in place in response to the received commands.