SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF

• US 20110079778A1
• Filed: 09/30/2010
• Published: 04/07/2011
• Est. Priority Date: 10/05/2009
• Status: Active Grant

• Current Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Original Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Inventors: TAKAHASHI, Masahiro, MIYANAGA, Akiharu, YAMAZAKI, Shunpei, SAKATA, Junichiro, KISHIDA, Hideyuki
• Granted Patent: US 9,627,198 B2
• Time in Patent Office: Days
• US Class Current: 257/43
• CPC Class Codes: G02F 1/1368 in which the switching element is a three-electrode device G02F1/136277 takes precedence
• CPC Class Codes: H01L 21/02164 the material being a silicon oxide, e.g. SiO2
• CPC Class Codes: H01L 21/02172 the material containing at least one metal element, e.g. metal oxides, metal nitrides, metal oxynitrides or metal carbides materials containing silicon H01L21/02123; metal silicates H01L21/02142
• CPC Class Codes: H01L 21/02266 deposition by physical ablation of a target, e.g. sputtering, reactive sputtering, physical vapour deposition or pulsed laser deposition
• CPC Class Codes: H01L 21/02422 Non-crystalline insulating materials, e.g. glass, polymers
• CPC Class Codes: H01L 21/02554 Oxides
• CPC Class Codes: H01L 21/02565 Oxide semiconducting materials not being Group 12/16 materials, e.g. ternary compounds
• CPC Class Codes: H01L 21/02631 Physical deposition at reduced pressure, e.g. MBE, sputtering, evaporation
• CPC Class Codes: H01L 21/477 Thermal treatment for modifying the properties of semiconductor bodies, e.g. annealing, sintering H01L21/38 - H01L21/449 and H01L21/461 - H01L21/475 take precedence
• CPC Class Codes: H01L 27/1225 with semiconductor materials not belonging to the group IV of the periodic table, e.g. InGaZnO
• CPC Class Codes: H01L 27/127 with a particular formation, treatment or patterning of the active layer specially adapted to the circuit arrangement
• CPC Class Codes: H01L 29/24 including, apart from doping materials or other impurities, only semiconductor materials not provided for in groups H01L29/16, H01L29/18, H01L29/20, H01L29/22 including organic materials H10K99/00
• CPC Class Codes: H01L 29/66969 of devices having semiconductor bodies not comprising group 14 or group 13/15 materials comprising selenium or tellurium in uncombined form other than as impurities in semiconductor bodies of other materials, comprising cuprous oxide or cuprous iodide H01L21/02365
• CPC Class Codes: H01L 29/7869 having a semiconductor body comprising an oxide semiconductor material, e.g. zinc oxide, copper aluminium oxide, cadmium stannate
• CPC Class Codes: H01L 29/78696 characterised by the structure of the channel, e.g. multichannel, transverse or longitudinal shape, length or width, doping structure, or the overlap or alignment between the channel and the gate, the source or the drain, or the contacting structure of the channel H01L29/78612 takes precedence; transistors having a drain offset region or a lightly doped drain [LDD] H01L29/78621
• CPC Class Codes: H10K 59/1213 the pixel elements being TFTs

Abstract

An object is to provide a semiconductor device with stable electric characteristics in which an oxide semiconductor is used. The impurity concentration in the oxide semiconductor layer is reduced in the following manner: a silicon oxide layer including many defects typified by dangling bonds is formed in contact with the oxide semiconductor layer, and an impurity such as hydrogen or moisture (a hydrogen atom or a compound including a hydrogen atom such as H₂O) included in the oxide semiconductor layer is diffused into the silicon oxide layer. Further, a mixed region is provided between the oxide semiconductor layer and the silicon oxide layer. The mixed region includes oxygen, silicon, and at least one kind of metal element that is included in the oxide semiconductor.

Claims

1. A semiconductor device comprising:

a gate electrode layer over a substrate;

a gate insulating layer over the gate electrode layer;

an oxide semiconductor layer over the gate insulating layer;

a source electrode layer and a drain electrode layer in electrical contact with the oxide semiconductor layer; and

a silicon oxide layer provided over the oxide semiconductor layer, the source electrode layer, and the drain electrode layer and in contact with at least a part of the oxide semiconductor layer,

wherein a mixed region is provided at an interface between the oxide semiconductor layer and the silicon oxide layer, and

wherein the mixed region includes oxygen, silicon, and at least one kind of metal element included in the oxide semiconductor layer.

2. The semiconductor device according to claim 1, wherein the mixed region has a thickness comprised between 1 nm and 10 nm.

3. The semiconductor device according to claim 1, further comprising a protective insulating layer covering the silicon oxide layer.

4. The semiconductor device according claim 1, wherein the oxide semiconductor layer includes one of indium, gallium, and zinc.

5. The semiconductor device according to claim 1, wherein the silicon oxide layer has a composition SiO_x such that x>

2.

6. A semiconductor device comprising:

a gate electrode layer over a substrate;

a gate insulating layer over the gate electrode layer;

an oxide semiconductor layer over the gate insulating layer;

a source electrode layer and a drain electrode layer in electrical contact with the oxide semiconductor layer;

a silicon oxide layer provided over the oxide semiconductor layer, the source electrode layer, and the drain electrode layer and in contact with at least a part of the oxide semiconductor layer; and

a protective insulating layer covering the silicon oxide layer,

wherein a mixed region is provided at an interface between the oxide semiconductor layer and the silicon oxide layer, and

wherein the mixed region includes oxygen, silicon, and at least one kind of metal element included in the oxide semiconductor layer.

7. The semiconductor device according to claim 6, wherein the mixed region has a thickness comprised between 1 nm and 10 nm.

8. The semiconductor device according claim 6, wherein the oxide semiconductor layer includes one of indium, gallium, and zinc.

9. The semiconductor device according to claim 6, wherein the silicon oxide layer has a composition represented by SiO_x where x represents a number superior to 2.

10. A manufacturing method of a semiconductor device comprising steps of:

forming a gate electrode layer over a substrate,

forming a gate insulating layer over the gate electrode layer;

introducing the substrate into a first treatment chamber in a reduced pressure state, after formation of the gate electrode layer and the gate insulating layer;

forming, over the gate insulating layer, an oxide semiconductor layer by introducing into the first treatment chamber a sputtering gas, and using a target of a metal oxide placed inside the first treatment chamber while removing residual moisture from the first treatment chamber;

forming, over the oxide semiconductor layer, a silicon oxide layer including defects by introducing the substrate into a second treatment chamber, introducing into the second treatment chamber a sputtering gas containing oxygen, and using a target including silicon placed inside the second treatment chamber, while removing residual moisture from the second treatment chamber; and

heating the substrate so as to diffuse towards, and trap into, the silicon oxide layer at least part of hydrogen or moisture included in the oxide semiconductor layer.

11. The manufacturing method of a semiconductor device according to claim 10, wherein the step of heating the substrate brings the substrate at a temperature comprised between 100°

C. and 400°

C.

12. The manufacturing method of a semiconductor device according to claim 10, wherein the silicon oxide layer including the defects is formed over the oxide semiconductor layer while a temperature of the substrate is comprised between 0°

C. and 50°

C.

13. The manufacturing method of a semiconductor device according to claim 10, wherein the target of the metal oxide includes one of indium, gallium, and zinc.

14. The manufacturing method of a semiconductor device according to claim 10, wherein the silicon oxide layer has a composition represented by SiO_x where x represents a number superior to 2.

15. The manufacturing method of a semiconductor device according to claim 10, wherein the removing of residual moisture is performed by exhaustion in any of the first treatment chamber and the second treatment chamber by using a cryopump.

16. The manufacturing method of a semiconductor device according to claim 10, wherein any of the sputtering gas and the sputtering gas containing oxygen has a purity of 6N or higher.

17. The manufacturing method of a semiconductor device according to claim 10, further comprising a step of forming, over the silicon oxide layer, a silicon nitride layer by introducing the substrate into a third treatment chamber in a reduced pressure state, removing residual moisture from the third treatment chamber, introducing in the third treatment chamber a sputtering gas containing nitrogen, and using a target including silicon placed inside the third treatment chamber.

18. The manufacturing method of a semiconductor device according to claim 17, wherein the step of heating the substrate is performed during the step of forming the silicon nitride layer.

19. The manufacturing method of a semiconductor device according to claim 17, wherein the step of heating the substrate is performed after the step of forming the silicon nitride layer.

20. The manufacturing method of a semiconductor device according to claim 17, wherein the removing of residual moisture is performed by exhaustion in the third treatment chamber by using a cryopump.

21. The manufacturing method of a semiconductor device according to claim 17, wherein the sputtering gas containing nitrogen has a purity of 6N or higher.

22. The manufacturing method of a semiconductor device according to claim 10, further comprising a step of forming, over the silicon oxide layer, a silicon nitride layer by switching from the sputtering gas containing oxygen to a sputtering gas containing nitrogen, and using the target including silicon which is placed inside the second treatment chamber.

23. The manufacturing method of a semiconductor device according to claim 22, wherein the step of heating the substrate is performed after the step of forming the silicon nitride layer.

24. The manufacturing method of a semiconductor device according to claim 22, wherein the sputtering gas containing nitrogen has a purity of 6N or higher.

25. A manufacturing method of a semiconductor device comprising steps of:

forming a gate electrode layer over a substrate,

forming a gate insulating layer over the gate electrode layer;

introducing the substrate into a first treatment chamber in a reduced pressure state, after formation of the gate electrode layer and the gate insulating layer;

forming, over the gate insulating layer, an oxide semiconductor layer by introducing into the first treatment chamber a sputtering gas, and using a target of a metal oxide placed inside the first treatment chamber while removing residual moisture from the first treatment chamber;

forming, over the oxide semiconductor layer, a silicon oxide layer including defects by introducing the substrate into a second treatment chamber, introducing into the second treatment chamber a sputtering gas containing oxygen, and using a target including silicon placed inside the second treatment chamber, while removing residual moisture from the second treatment chamber;

forming, over the silicon oxide layer, a silicon nitride layer by introducing the substrate into a third treatment chamber in a reduced pressure state, removing residual moisture from the third treatment chamber, introducing in the third treatment chamber a sputtering gas containing nitrogen, and using a target including silicon placed inside the third treatment chamber; and

heating the substrate so as to diffuse towards, and trap into, the silicon oxide layer at least part of hydrogen or moisture included in the oxide semiconductor layer.

26. The manufacturing method of a semiconductor device according to claim 25, wherein the step of heating the substrate brings the substrate at a temperature comprised between 100°

C. and 400°

C.

27. The manufacturing method of a semiconductor device according to claim 25, wherein the silicon oxide layer including the defects is formed over the oxide semiconductor layer while a temperature of the substrate is comprised between 0°

C. and 50°

C.

28. The manufacturing method of a semiconductor device according to claim 25, wherein the target of the metal oxide includes one of indium, gallium, and zinc.

29. The manufacturing method of a semiconductor device according to claim 25, wherein the silicon oxide layer has a composition represented by SiO_x where x represents a number superior to 2.

30. The manufacturing method of a semiconductor device according to claim 25, wherein the removing of residual moisture is performed by exhaustion in any of the first treatment chamber, the second treatment chamber and the third treatment chamber by using a cryopump.

31. The manufacturing method of a semiconductor device according to claim 25, wherein any of the sputtering gas, the sputtering gas containing oxygen and the sputtering gas containing nitrogen has a purity of 6N or higher.

32. The manufacturing method of a semiconductor device according to claim 25, wherein the step of heating the substrate is performed during the step of forming the silicon nitride layer.

33. The manufacturing method of a semiconductor device according to claim 25, wherein the step of heating the substrate is performed after the step of forming the silicon nitride layer.

34. A manufacturing method of a semiconductor device comprising steps of:

forming a gate electrode layer over a substrate,

forming a gate insulating layer over the gate electrode layer;

introducing the substrate into a first treatment chamber in a reduced pressure state, after formation of the gate electrode layer and the gate insulating layer;

forming, over the gate insulating layer, an oxide semiconductor layer by introducing into the first treatment chamber a sputtering gas, and using a target of a metal oxide placed inside the first treatment chamber while removing residual moisture from the first treatment chamber;

forming, over the oxide semiconductor layer, a silicon oxide layer including defects by introducing the substrate into a second treatment chamber, introducing into the second treatment chamber a sputtering gas containing oxygen, and using a target including silicon placed inside the second treatment chamber, while removing residual moisture from the second treatment chamber;

forming, over the silicon oxide layer, a silicon nitride layer by switching from the sputtering gas containing oxygen to a sputtering gas containing nitrogen, and using the target including silicon which is placed inside the second treatment chamber; and

heating the substrate so as to diffuse towards, and trap into, the silicon oxide layer at least part of hydrogen or moisture included in the oxide semiconductor layer.

35. The manufacturing method of a semiconductor device according to claim 34, wherein the step of heating the substrate brings the substrate at a temperature comprised between 100°

C. and 400°

C.

36. The manufacturing method of a semiconductor device according to claim 34, wherein the silicon oxide layer including the defects is formed over the oxide semiconductor layer while a temperature of the substrate is comprised between 0°

C. and 50°

C.

37. The manufacturing method of a semiconductor device according to claim 34, wherein the target of the metal oxide includes one of indium, gallium, and zinc.

38. The manufacturing method of a semiconductor device according to claim 34, wherein the silicon oxide layer has a composition represented by SiO_x where x represents a number superior to 2.

39. The manufacturing method of a semiconductor device according to claim 34, wherein the removing residual moisture is performed by exhaustion in any of the first treatment chamber and the second treatment chamber by using a cryopump.

40. The manufacturing method of a semiconductor device according to claim 34, wherein any of the sputtering gas, the sputtering gas containing oxygen and the sputtering gas containing nitrogen has a purity of 6N or higher.

41. The manufacturing method of a semiconductor device according to claim 34, wherein the step of heating the substrate is performed after the step of forming the silicon nitride layer.