THIN FILM TRANSISTOR, METHOD OF MANUFACTURING THE THIN FILM TRANSISTOR AND ORGANIC LIGHT EMITTING DISPLAY DEVICE HAVING THIN FILM TRANSISTOR

• US 20110079784A1
• Filed: 09/28/2010
• Published: 04/07/2011
• Est. Priority Date: 10/06/2009
• Status: Abandoned Application

• Current Assignee: Samsung Display Company Limited (Samsung Electronics Co. Ltd.)
• Original Assignee: Samsung Mobile Display Company Limited (Samsung Electronics Co. Ltd.)
• Inventors: Im, Ki-Ju
• Application Number:
  US12/892,855
• Publication Number:
  US 20110079784A1
• Time in Patent Office: Days
• US Class Current: 257/59
• CPC Class Codes: H01L 29/78648 arranged on opposing sides of the channel
• CPC Class Codes: H01L 29/7869 having a semiconductor body comprising an oxide semiconductor material, e.g. zinc oxide, copper aluminium oxide, cadmium stannate
• CPC Class Codes: H10K 59/1213 the pixel elements being TFTs

Abstract

Embodiments relate to a thin film transistor using an oxide semiconductor as an active layer, a method of manufacturing the thin film transistor, and an organic light emitting display device having the thin film transistor. In one embodiment, the thin film transistor includes a substrate, a first gate electrode formed over the substrate, a gate insulating layer formed over the first gate electrode and substrate and an active layer, comprising an oxide semiconductor, formed on the gate insulating layer. The transistor further includes a passivation layer formed on the active layer, source and drain electrodes formed on the passivation layer and electrically connected to the active layer and a second gate electrode formed on the passivation layer and located between the source electrode and the drain electrode.

Claims

1. A thin film transistor, comprising:

a substrate;

a first gate electrode formed over the substrate;

a gate insulating layer formed over the first gate electrode and substrate;

an active layer, comprising an oxide semiconductor, formed on the gate insulating layer;

a passivation layer formed on the active layer;

source and drain electrodes formed on the passivation layer and electrically connected to the active layer; and

a second gate electrode formed on the passivation layer and located between the source electrode and the drain electrode.

2. The thin film transistor of claim 1, wherein the passivation layer is formed on the active layer, and wherein the source and drain electrodes are electrically connected to the active layer through a contact hole formed on the passivation layer.

3. The thin film transistor of claim 1, wherein the second gate electrode at least partially overlaps with the first gate electrode.

4. The thin film transistor of claim 1, wherein the second gate electrode is spaced apart from the source electrode and the drain electrode.

5. The thin film transistor of claim 1, wherein the source electrode, the drain electrode, and the second gate electrode are made of the same material, and are formed on the same plane.

6. The thin film transistor of claim 1, wherein the oxide semiconductor contains zinc oxide (ZnO).

7. The thin film transistor of claim 6, wherein the oxide semiconductor comprises at least one ion of:

gallium (Ga), indium (In), stanium (Sn), zirconium (Zr), hafnium (Hf), and vanadium (V).

8. The thin film transistor of claim 1, further comprising:

a buffer layer formed between the substrate and the first gate electrode.

9. A method of manufacturing a thin film transistor, comprising:

forming a first gate electrode over a substrate;

forming a gate insulating layer on the first gate electrode;

forming an semiconductor active layer on the gate insulating layer;

forming a passivation layer on the active layer and gate insulating layer; and

forming source and drain electrodes, and a second gate electrode on the passivation layer, wherein the source and drain electrodes are electrically connected to the active layer, and wherein the second gate electrode is disposed between the source and drain electrodes.

10. The method of manufacturing a thin film transistor of claim 9, wherein forming a passivation layer comprises:

forming the passivation layer on the active layer; and

forming a contact hole on the passivation layer.

11. The method of manufacturing a thin film transistor of claim 10, wherein forming the source electrode, the drain electrode, and the second gate electrode comprises:

forming a conductive layer on the passivation layer so as to fill the contact hole; and

forming i) the source and drain electrodes so as to be electrically connected to the active layer through the contact hole and ii) the second gate electrode between the source and drain electrodes by patterning the conductive layer.

12. The method of manufacturing a thin film transistor of claim 11, further comprising using the passivation layer as an etch stop layer for patterning the conductive layer.

13. The method of manufacturing a thin film transistor of claim 9, wherein the second gate electrode at least partially overlaps with the first gate electrode.

14. The method of manufacturing a thin film transistor of claim 9, wherein the second gate electrode is spaced apart from the source and drain electrodes.

15. The method of manufacturing a thin film transistor of claim 9, wherein a first channel region is formed between the first gate electrode and the active layer, and wherein a second channel region is formed between the active layer and the second gate electrode.

16. An organic light emitting display device, comprising:

a first substrate;

a second substrate disposed to face the first substrate;

an organic light emitting device interposed between the first and second substrates, wherein the organic light emitting device comprises i) first and second electrodes, ii) an organic light emitting layer interposed between the first and second electrodes and iii) a thin film transistor configured to control an operation of the organic light emitting device; and

wherein the thin film transistor comprises

a substrate;

a first gate electrode formed over the substrate;

a gate insulating layer formed over the first gate electrode and substrate;

an active layer, comprising an oxide semiconductor, formed on the gate insulating layer;

a passivation layer formed on the active layer;

source and drain electrodes formed on the passivation layer and electrically connected to the active layer; and

a second gate electrode formed on the passivation layer and located between the source electrode and the drain electrode.

17. The organic light emitting display device of claim 16, wherein the passivation layer is formed on the active layer, and wherein the source and drain electrodes are electrically connected to the active layer through a contact hole formed on the passivation layer.

18. The organic light emitting display device of claim 16, wherein the second gate electrode at least partially overlaps with the first gate electrode.

19. The organic light emitting display device of claim 16, wherein the source electrode, the drain electrode, and the second gate electrode are made of the same material, and are formed on the same plane.

20. The organic light emitting display device of claim 16, wherein a first channel region is formed between the first gate electrode and the active layer, and wherein a second channel region is formed between the active layer and the second gate electrode.