OXIDE SEMICONDUCTOR LAYER AND SEMICONDUCTOR DEVICE

• US 20110084264A1
• Filed: 10/04/2010
• Published: 04/14/2011
• Est. Priority Date: 10/08/2009
• Status: Active Grant

• Current Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Original Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Inventors: SHIMAZU, Takashi, TAKAHASHI, Masahiro, MIYANAGA, Akiharu, HIROHASHI, Takuya, YAMAZAKI, Shunpei, SAKAKURA, Masayuki
• Granted Patent: US 8,319,218 B2
• Time in Patent Office: Days
• US Class Current: 257/43
• CPC Class Codes: H01L 29/78606 with supplementary region or layer in the thin film or in the insulated bulk substrate supporting it for controlling or increasing the safety of the device H01L29/78642, H01L29/78645 take precedence
• CPC Class Codes: H01L 29/78618 characterised by the drain or the source properties, e.g. the doping structure, the composition, the sectional shape or the contact structure silicide contacts, electrodes in general H01L29/458
• CPC Class Codes: H01L 29/7869 having a semiconductor body comprising an oxide semiconductor material, e.g. zinc oxide, copper aluminium oxide, cadmium stannate
• CPC Class Codes: H01L 29/78693 the semiconducting oxide being amorphous
• CPC Class Codes: H01L 29/78696 characterised by the structure of the channel, e.g. multichannel, transverse or longitudinal shape, length or width, doping structure, or the overlap or alignment between the channel and the gate, the source or the drain, or the contacting structure of the channel H01L29/78612 takes precedence; transistors having a drain offset region or a lightly doped drain [LDD] H01L29/78621

Abstract

An object is to provide an oxide semiconductor layer having a novel structure which is preferably used for a semiconductor device. Alternatively, another object is to provide a semiconductor device using an oxide semiconductor layer having the novel structure. An oxide semiconductor layer includes an amorphous region which is mainly amorphous and a crystal region containing crystal grains of In₂Ga₂ZnO₇ in a vicinity of a surface, in which the crystal grains are oriented so that the c-axis is almost vertical with respect to the surface. Alternatively, a semiconductor device uses such an oxide semiconductor layer.

Claims

1. A semiconductor device comprising:

a substrate;

a gate electrode layer over the substrate;

a gate insulating layer over the gate electrode layer;

an oxide semiconductor layer over the gate insulating layer; and

a source electrode layer and a drain electrode layer electrically connected to the oxide semiconductor layer,

wherein the oxide semiconductor layer includes an amorphous region and a crystal region,

wherein the amorphous region contains an amorphous oxide semiconductor containing In, Ga, and Zn,

wherein the crystal region contains crystal grains of In₂Ga₂ZnO₇ in a vicinity of a surface of the oxide semiconductor layer, and

wherein the crystal grains are oriented so that a c-axis is almost vertical with respect to the surface.

2. The semiconductor device according to claim 1, wherein the crystal grains of In₂Ga₂ZnO₇ has a stacked-layer structure of a first layer containing In, a second layer without In, a third layer without In, a fourth layer containing In, and a fifth layer without In.

3. The semiconductor device according to claim 2, wherein one of a 5 s orbital of In is overlapped with an adjacent 5 s orbital of In in the first layer containing In or the fourth layer containing In.

4. The semiconductor device according to claim 1, wherein a Zn content is less than an In content or a Ga content in the amorphous region.

5. The semiconductor device according to claim 1, wherein a length of the crystal grains in the c-axis direction is less than five times as long as a length of the crystal grains in an a-axis direction or a b-axis direction.

6. The semiconductor device according to claim 1, further comprising an insulating layer covering the oxide semiconductor layer.

7. The semiconductor device according to claim 1, wherein the source electrode layer or the drain electrode layer, and the oxide semiconductor layer are electrically connected to each other on an upper surface or a lower surface of the oxide semiconductor layer.

8. The semiconductor device according to claim 6, wherein the source electrode layer or the drain electrode layer, and the oxide semiconductor layer are electrically connected to each other on an upper surface or a lower surface of the oxide semiconductor layer.

9. A semiconductor device comprising:

a substrate;

an oxide semiconductor layer over the substrate;

a gate insulating layer over the oxide semiconductor layer;

a gate electrode layer over the gate insulating layer; and

a source electrode layer and a drain electrode layer electrically connected to the oxide semiconductor layer,

wherein the oxide semiconductor layer includes an amorphous region and a crystal region,

wherein the amorphous region contains an amorphous oxide semiconductor containing In, Ga, and Zn,

wherein the crystal region contains crystal grains of In₂Ga₂ZnO₇ in a vicinity of a surface of the oxide semiconductor layer, and

wherein the crystal grains are oriented so that a c-axis is almost vertical with respect to the surface.

10. The semiconductor device according to claim 9, wherein the crystal grains of In₂Ga₂ZnO₇ has a stacked-layer structure of a first layer containing In, a second layer without In, a third layer without In, a fourth layer containing In, and a fifth layer without In.

11. The semiconductor device according to claim 10, wherein one of a 5 s orbital of In is overlapped with an adjacent 5 s orbital of In in the first layer containing In or the fourth layer containing In.

12. The semiconductor device according to claim 9, wherein a Zn content is less than an In content or a Ga content in the amorphous region.

13. The semiconductor device according to claim 9, wherein a length of the crystal grains in the c-axis direction is less than five times as long as the length of the crystal grains in an a-axis direction or a b-axis direction.

14. The semiconductor device according to claim 9, further comprising an insulating layer covering the oxide semiconductor layer.

15. The semiconductor device according to claim 9, wherein the source electrode layer or the drain electrode layer, and the oxide semiconductor layer are electrically connected to each other on an upper surface or a lower surface of the oxide semiconductor layer.

16. The semiconductor device according to claim 14, wherein the source electrode layer or the drain electrode layer, and the oxide semiconductor layer are electrically connected to each other on an upper surface or a lower surface of the oxide semiconductor layer.