SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF

• US 20110084271A1
• Filed: 10/07/2010
• Published: 04/14/2011
• Est. Priority Date: 10/14/2009
• Status: Active Grant

• Current Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Original Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Inventors: AKIMOTO, Kengo, YAMAZAKI, Shunpei, NODA, Kosei, SAKATA, Junichiro
• Granted Patent: US 8,324,621 B2
• Time in Patent Office: Days
• US Class Current: 257/43
• CPC Class Codes: B82Y 30/00 Nanotechnology for materials or surface science, e.g. nanocomposites
• CPC Class Codes: H01L 27/1214 comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
• CPC Class Codes: H01L 27/1225 with semiconductor materials not belonging to the group IV of the periodic table, e.g. InGaZnO
• CPC Class Codes: H01L 27/124 with a particular composition, shape or layout of the wiring layers specially adapted to the circuit arrangement, e.g. scanning lines in LCD pixel circuits wiring structures per se H01L23/52
• CPC Class Codes: H01L 27/1255 integrated with passive devices, e.g. auxiliary capacitors
• CPC Class Codes: H01L 29/45 Ohmic electrodes
• CPC Class Codes: H01L 29/4908 for thin film semiconductor, e.g. gate of TFT

Abstract

Disclosed is a highly reliable semiconductor device and a manufacturing method thereof, which is achieved by using a transistor with favorable electrical characteristics and high reliability as a switching element. The semiconductor device includes a driver circuit portion and a pixel portion over one substrate, and the pixel portion comprises a light-transmitting bottom-gate transistor. The light-transmitting bottom-gate transistor comprises: a transparent gate electrode layer; an oxide semiconductor layer over the gate electrode layer, a superficial layer of the oxide semiconductor layer including comprising a microcrystal group of nanocrystals; and source and drain electrode layers formed over the oxide semiconductor layer, the source and drain electrode layers comprising a light-transmitting oxide conductive layer.

Claims

1. A semiconductor device comprising:

a pixel portion including a first transistor and a driver circuit portion including a second transistor, the pixel portion and the driver circuit portion being provided over a substrate,

wherein the first transistor and the second transistor each comprise;

a gate electrode layer;

a gate insulating layer over the gate electrode layer;

an oxide semiconductor layer over the gate insulating layer, wherein a superficial layer of the oxide semiconductor layer comprises a microcrystal group of nanocrystals;

a source electrode layer and a drain electrode layer over the oxide semiconductor layer; and

an oxide insulating layer over the oxide semiconductor layer, the source electrode layer, and the drain electrode layer, the oxide insulating layer being in contact with the oxide semiconductor layer,

wherein the gate electrode layer, the source electrode layer, and the drain electrode layer of the first transistor comprise an oxide conductive layer, and

wherein the gate electrode layer, the source electrode layer, and the drain electrode layer of the second transistor comprise a metal layer.

2. The semiconductor device according to claim 1,

wherein the oxide conductive layer has a light-transmitting property.

3. The semiconductor device according to claim 1,

wherein the metal layer comprises an element selected from Ti, Mo, W, Al, Cr, Cu, and Ta.

4. The semiconductor device according to claim 1,

wherein the second transistor further comprises a second oxide conductive layer between the oxide semiconductor layer and the source electrode layer and between the oxide semiconductor layer and the drain electrode layer.

5. The semiconductor device according to claim 1,

wherein the oxide insulating layer comprises silicon oxide, silicon nitride oxide, aluminum oxide, or aluminum oxynitride.

6. The semiconductor device according to claim 1,

wherein the second transistor further comprises a conductive layer over the oxide insulating layer, and

wherein the conductive layer overlaps with the gate electrode layer.

7. The semiconductor device according to claim 1, further comprising a storage capacitor in the pixel portion,

wherein the storage capacitor is formed by a capacitor wiring layer, a dielectric over the capacitor wiring layer, and a capacitor electrode layer over the dielectric,

wherein the capacitor wiring layer comprises the same material as the gate electrode layer of the first transistor,

wherein the dielectric comprises the same material as the gate insulating layer of the first transistor, and

wherein the capacitor electrode layer comprises the same material as the source electrode layer and the drain electrode layer of the first transistor.

8. The semiconductor device according to claim 1, further comprising:

a pixel electrode layer in the pixel portion, the pixel electrode layer being electrically connected to one of the source electrode layer and the drain electrode layer of the first transistor; and

a storage capacitor in the pixel portion,

wherein the storage capacitor is formed by a capacitor wiring layer, a dielectric over the capacitor wiring layer, and the pixel electrode layer,

wherein the capacitor wiring layer comprises the same material as the source electrode layer and the drain electrode layer of the first transistor, and

wherein the dielectric comprises the same material as the oxide insulating layer of the first transistor.

9. A semiconductor device comprising:

a pixel portion including a first transistor and a storage capacitor over a substrate; and

a driver circuit portion including a second transistor over the substrate,

wherein the first transistor and the second transistor each comprise;

a gate electrode layer;

a gate insulating layer over the gate electrode layer;

an oxide semiconductor layer over the gate insulating layer, wherein a superficial layer of the oxide semiconductor layer comprises a microcrystal group of nanocrystals;

a source electrode layer and a drain electrode layer over the oxide semiconductor layer; and

an oxide insulating layer over the oxide semiconductor layer, the source electrode layer, and the drain electrode layer, the oxide insulating layer being in contact with the oxide semiconductor layer,

wherein the storage capacitor is formed by a capacitor wiring layer, a dielectric over the capacitor wiring layer, and a capacitor electrode layer over the dielectric,

wherein the gate electrode layer, the source electrode layer, and the drain electrode layer of the first transistor comprise an oxide conductive layer,

wherein the gate electrode layer, the source electrode layer, and the drain electrode layer of the second transistor comprise a metal layer,

wherein the capacitor wiring layer comprises the same material as the gate electrode layer of the first transistor,

wherein the dielectric comprises the same material as the gate insulating layer of the first transistor, and

wherein the capacitor electrode layer comprises the same material of the oxide semiconductor layer of the first transistor.

10. The semiconductor device according to claim 9,

wherein a superficial layer of the capacitor electrode layer comprises the microcrystal group of nanocrystals.

11. The semiconductor device according to claim 9,

wherein the oxide conductive layer has a light-transmitting property.

12. The semiconductor device according to claim 9,

wherein the metal layer comprises an element selected from Ti, Mo, W, Al, Cr, Cu, and Ta.

13. The semiconductor device according to claim 9,

wherein the second transistor further comprises a second oxide conductive layer between the oxide semiconductor layer and the source electrode layer and between the oxide semiconductor layer and the drain electrode layer.

14. The semiconductor device according to claim 9,

wherein the oxide insulating layer comprises silicon oxide, silicon nitride oxide, aluminum oxide, or aluminum oxynitride.

15. The semiconductor device according to claim 9,

wherein the second transistor further comprises a conductive layer over the oxide insulating layer, and

wherein the conductive layer overlaps with the gate electrode layer.

16. A method for manufacturing a semiconductor device, comprising the steps of:

forming a first gate electrode layer and a second gate electrode layer over a substrate having an insulating surface;

forming a gate insulating layer over the first gate electrode layer and the second gate electrode layer;

forming a first oxide semiconductor layer and a second oxide semiconductor layer over the first gate electrode layer and the second gate electrode layer, respectively, with the gate insulating layer interposed between the first oxide semiconductor layer and the first gate electrode layer and between the second oxide semiconductor layer and the second gate electrode layer;

forming a microcrystal group of nanocrystals in a superficial layer of each of the first oxide semiconductor layer and the second oxide semiconductor layer;

forming an oxide conductive layer over the first oxide semiconductor layer and the second oxide semiconductor layer;

forming a metal layer over the oxide conductive layer;

etching the metal layer and the oxide conductive layer to form a first source electrode layer and a first drain electrode layer over the first oxide semiconductor layer and to form a second source electrode layer and a second drain electrode layer over the second oxide semiconductor layer, and

forming an oxide insulating layer over the first oxide semiconductor layer, the second oxide semiconductor layer, the first source electrode layer, the first drain electrode layer, the second source electrode layer, and the second drain electrode layer,

wherein the etching is performed to allow the first source electrode layer and the first drain electrode layer to comprise the oxide conductive layer and to allow the second source electrode layer and the second drain electrode layer to comprise the oxide conductive layer and the metal layer.

17. The method according to claim 16,

wherein the oxide insulating layer is formed so as to be in contact with the first oxide semiconductor layer and the second oxide semiconductor layer.

18. The method according to claim 16,

wherein the first gate electrode layer is formed using an oxide conductor.

19. The method according to claim 16,

wherein the second gate electrode layer is formed using an element selected from Ti, Mo, W, Al, Cr, Cu, and Ta.

20. The method according to claim 16,

the formation of the microcrystal group of nanocrystals is performed by a heating treatment of the first oxide semiconductor layer and the second oxide semiconductor layer.

21. The method according to claim 16,

wherein the oxide insulating layer is formed using a material selected from silicon oxide, silicon nitride oxide, aluminum oxide, and aluminum oxynitride.

22. The method according to claim 16, further comprising a step of:

forming a second metal layer over the second gate electrode layer, the second oxide semiconductor layer, and the oxide insulating layer.

23. The method according to claim 16, further comprising a step of:

forming a pixel electrode layer over the first gate electrode layer, the first oxide semiconductor layer, and the oxide insulating layer.

24. The method according to claim 16, further comprising the steps of:

forming a capacitor wiring layer over the substrate;

forming a dielectric over the capacitor wiring layer; and

forming a capacitor electrode over the dielectric,

wherein the capacitor wiring layer is formed using the same material as the first gate electrode layer,

wherein the dielectric is formed using the same material as the gate insulating layer,

wherein the capacitor electrode is formed using the same material as the first source electrode layer and the first drain electrode layer, and

wherein a storage capacitor is formed by the capacitor wiring layer, the dielectric, and the capacitor electrode.

25. The method according to claim 16, further comprising the steps of:

forming a capacitor wiring layer over the substrate;

forming a dielectric over the capacitor wiring layer; and

forming a pixel electrode layer over the dielectric,

wherein the capacitor wiring layer is formed using the same material as the first source electrode layer and the first drain electrode layer,

wherein the dielectric is formed using the same material as the oxide insulating layer, and

wherein a storage capacitor is formed by the capacitor wiring layer, the dielectric, and the pixel electrode layer.

26. The method according to claim 16, further comprising the steps of:

forming a capacitor wiring layer over the substrate;

forming a dielectric over the capacitor wiring layer; and

forming a capacitor electrode over the dielectric,

wherein the capacitor wiring layer is formed using the same material as the first gate electrode layer,

wherein the dielectric is formed using the same material as the gate insulating layer,

wherein the capacitor electrode is formed using the same material as the first oxide semiconductor layer, and

wherein a storage capacitor is formed by the capacitor wiring layer, the dielectric, and the capacitor electrode.