SEMICONDUCTOR DEVICE

• US 20110084273A1
• Filed: 10/07/2010
• Published: 04/14/2011
• Est. Priority Date: 10/09/2009
• Status: Active Grant

• Current Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Original Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Inventors: Takahashi, Masahiro, Kishida, Hideyuki, Sakata, Junichiro, Yamazaki, Shunpei, Miyanaga, Akiharu
• Granted Patent: US 9,911,856 B2
• Time in Patent Office: Days
• US Class Current: 257/43
• CPC Class Codes: H01L 29/42384 for thin film field effect transistors, e.g. characterised by the thickness or the shape of the insulator or the dimensions, the shape or the lay-out of the conductor
• CPC Class Codes: H01L 29/78606 with supplementary region or layer in the thin film or in the insulated bulk substrate supporting it for controlling or increasing the safety of the device H01L29/78642, H01L29/78645 take precedence
• CPC Class Codes: H01L 29/7869 having a semiconductor body comprising an oxide semiconductor material, e.g. zinc oxide, copper aluminium oxide, cadmium stannate
• CPC Class Codes: H01L 29/78696 characterised by the structure of the channel, e.g. multichannel, transverse or longitudinal shape, length or width, doping structure, or the overlap or alignment between the channel and the gate, the source or the drain, or the contacting structure of the channel H01L29/78612 takes precedence; transistors having a drain offset region or a lightly doped drain [LDD] H01L29/78621

Abstract

One of objects is to provide a semiconductor device with stable electric characteristics, in which an oxide semiconductor is used. The semiconductor device includes a thin film transistor including an oxide semiconductor layer, and a silicon oxide layer over the thin film transistor. The thin film transistor includes a gate electrode layer, a gate insulating layer whose thickness is equal to or larger than 100 nm and equal to or smaller than 350 nm, the oxide semiconductor layer, a source electrode layer and a drain electrode layer. In the thin film transistor, the difference of the threshold voltage value is 1 V or less between before and after performance of a measurement in which the voltage of 30 V or −30 V is applied to the gate electrode layer at a temperature of 85° C. for 12 hours.

Claims

1. A semiconductor device comprising:

a thin film transistor, the thin film transistor comprising;

a gate electrode layer;

a gate insulating layer with a thickness equal to or larger than 100 nm and equal to or smaller than 350 nm over the gate electrode layer;

an oxide semiconductor layer over the gate insulating layer; and

a source electrode layer and a drain electrode layer in electrical contact with the oxide semiconductor layer, and

a silicon oxide layer which is over the source electrode layer and the drain electrode layer and partly in contact with the oxide semiconductor layer,

wherein a difference of a threshold voltage value of the thin film transistor is 1 V or less, between before and after performance of a measurement in which a voltage of 30 V or −

30 V is applied to the gate electrode layer at a temperature of 85°

C. for 12 hours.

2. The semiconductor device according to claim 1, wherein the silicon oxide layer includes a defect.

3. The semiconductor device according to claim 1, further comprising a mixed region at an interface between the oxide semiconductor layer and the silicon oxide layer,

wherein the mixed region includes oxygen, silicon, and at least one kind of metal elements included in the oxide semiconductor layer.

4. The semiconductor device according to claim 3, wherein the mixed region has a thickness of 1 nm to 10 nm.

5. The semiconductor device according to claim 1, wherein the gate insulating layer is a silicon oxide layer or a stacked layer in which a silicon nitride layer and a silicon oxide layer are formed over the gate electrode layer in this order.

6. The semiconductor device according to claim 1, further comprising a protective insulating layer which covers the silicon oxide layer.

7. The semiconductor device according to claim 1, wherein the oxide semiconductor layer includes at least one of indium, gallium and zinc.

8. A semiconductor device comprising:

a thin film transistor, the thin film transistor comprising;

a gate electrode layer;

a gate insulating layer with a thickness equal to or larger than 100 nm and equal to or smaller than 350 nm over the gate electrode layer;

an oxide semiconductor layer over the gate insulating layer; and

a source electrode layer and a drain electrode layer in electrical contact with the oxide semiconductor layer, and

a silicon oxide layer which is over the source electrode layer and the drain electrode layer and partly in contact with the oxide semiconductor layer,

wherein a hydrogen concentration in the oxide semiconductor layer and a hydrogen concentration in an interface between the oxide semiconductor layer and the silicon oxide layer, which is measured by secondary ion mass spectrometry, is 5×

10¹⁹/cm³ or lower, and

wherein a difference of a threshold voltage value of the thin film transistor is 1 V or less, between before and after performance of a measurement in which a voltage of 30 V or −

30 V is applied to the gate electrode layer at a temperature of 85°

C. for 12 hours.

9. The semiconductor device according to claim 8, wherein the silicon oxide layer includes a defect.

10. The semiconductor device according to claim 8, further comprising a mixed region at the interface between the oxide semiconductor layer and the silicon oxide layer,

wherein the mixed region includes oxygen, silicon, and at least one kind of metal elements included in the oxide semiconductor layer.

11. The semiconductor device according to claim 10, wherein the mixed region has a thickness of 1 nm to 10 nm.

12. The semiconductor device according to claim 8, wherein the gate insulating layer is a silicon oxide layer or a stacked layer in which a silicon nitride layer and a silicon oxide layer are formed over the gate electrode layer in this order.

13. The semiconductor device according to claim 8, further comprising a protective insulating layer which covers the silicon oxide layer.

14. The semiconductor device according to claim 8, wherein the oxide semiconductor layer includes at least one of indium, gallium and zinc.