LOGIC CIRCUIT AND DISPLAY DEVICE HAVING THE SAME

• US 20110084731A1
• Filed: 09/30/2010
• Published: 04/14/2011
• Est. Priority Date: 10/09/2009
• Status: Active Grant

• Current Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Original Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Inventors: KAWAE, Daisuke
• Granted Patent: US 8,289,052 B2
• Time in Patent Office: Days
• US Class Current: 326/102
• CPC Class Codes: G02F 1/1362 Active matrix addressed cells G02F1/134336, G02F1/134363 take precedence
• CPC Class Codes: G02F 1/167 by electrophoresis
• CPC Class Codes: G02F 1/1671 involving dry toners
• CPC Class Codes: H03K 19/09407 of the same canal type

Abstract

It is an object to provide a logic circuit which can be operated even when unipolar transistors are used. A logic circuit includes a source follower circuit and a logic circuit an input portion of which is connected to an output portion of the source follower circuit and all transistors are unipolar transistors. A potential of a wiring for supplying a low potential connected to the source follower circuit is lower than a potential of a wiring for supplying a low potential connected to the logic circuit which includes unipolar transistors. In this manner, a logic circuit which can be operated even with unipolar depletion transistors can be provided.

Claims

1. A semiconductor device comprising:

a source follower circuit having an output portion;

a logic circuit having an input portion electrically connected to the output portion, the logic circuit comprising a transistor;

a first wiring electrically connected to the source follower circuit, the first wiring being adopted to be supplied with a first potential, and;

a second wiring electrically connected to the logic circuit, the second wiring being adopted to be supplied with a second potential.

wherein the first potential is lower than the second potential.

2. The semiconductor device according to claim 1, wherein the logic circuit is an inverter circuit.

3. The semiconductor device according to claim 1, wherein the logic circuit is a NOR circuit.

4. The semiconductor device according to claim 1, wherein the logic circuit is a NAND circuit.

5. The semiconductor device according to claim 1, wherein the transistor is comprised of an oxide semiconductor.

6. The semiconductor device according to claim 1, wherein the transistor has n-type conductivity.

7. A semiconductor device comprising:

a source follower circuit having an output portion;

a logic circuit having an input portion electrically connected to the input portion, the logic circuit comprising a plurality of transistors;

a first wiring electrically connected to the source follower circuit, the first wiring being adopted to be supplied with a first potential, and

a second wiring electrically connected to the logic circuit, the second wiring being adopted to be supplied with a second potential

wherein the plurality of transistors are unipolar transistors, and

wherein the first potential is lower than the second potential.

8. The semiconductor device according to claim 7, wherein the logic circuit is an inverter circuit.

9. The semiconductor device according to claim 7, wherein the logic circuit is a NOR circuit.

10. The semiconductor device according to claim 7, wherein the logic circuit is a NAND circuit.

11. The semiconductor device according to claim 7, wherein the plurality of transistors are comprised of an oxide semiconductor.

12. The semiconductor device according to claim 7, wherein the plurality of transistors have n-type conductivity.

13. A semiconductor device comprising:

a logic circuit comprising;

an input terminal, an output terminal, a first transistor, a second transistor, a third transistor and a fourth transistor;

one of a source and a drain of the first transistor electrically connected to a first wiring, the first wiring being adopted to be supplied with a first potential;

a gate of the first transistor electrically connected to the input terminal;

one of a source and a drain of the second transistor electrically connected to the other of the source and the drain of the first transistor,

the other of the source and the drain of the second transistor electrically connected to a second wiring, the second wiring being adopted to be supplied with a second potential;

a gate of the second transistor electrically connected to a third wiring, the third wiring being adopted to be supplied with a first constant potential;

one of a source and a drain of the third transistor electrically connected to the fourth wiring, the fourth wiring being adopted to be supplied with the first potential

a gate of the third transistor electrically connected to the fifth wiring, the fifth wiring being adopted to be supplied with a second constant potential

one of a source and a drain of the fourth transistor electrically connected to the other of the source and the drain of the third transistor;

the other of the source and the drain of the fourth transistor electrically connected to a sixth wiring, the sixth wiring being adopted to be supplied with a third potential;

a gate of the fourth transistor electrically connected between the first transistor and the second transistor,

wherein the output terminal is electrically connected between the third transistor and the fourth transistor,

wherein the second potential is lower than the third potential.

14. The semiconductor device according to claim 13, wherein the logic circuit is an inverter circuit.

15. The semiconductor device according to claim 13, wherein the logic circuit is a NOR circuit.

16. The semiconductor device according to claim 13, wherein the logic circuit is a NAND circuit.

17. The semiconductor device according to claim 13, wherein the first transistor, the second transistor, the third transistor and the fourth transistor are comprised of an oxide semiconductor.

18. The semiconductor device according to claim 13, wherein the first transistor, the second transistor, the third transistor and the fourth transistor have n-type conductivity.