Video Processing System and Method with Dynamic Tag Architecture
3 Assignments
0 Petitions
Accused Products
Abstract
A method of processing digital video signals, comprising: receiving input pixels to be processed; performing multiple processing operations on the input pixels, where the multiple processing operations are performed during a time interval determined in part by a desired video output rate; and performing a classification analysis at an intermediate time during the time interval, the classification analysis yielding tag data that is used to dynamically vary one or more of the multiple processing operations, and where the tag data is generated on a per-pixel basis to enable pixel by pixel variation of the multiple processing operations.
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Citations
47 Claims
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1-22. -22. (canceled)
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23. A method of processing digital video signals, comprising:
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receiving input pixels to be processed; performing multiple processing operations on the input pixels, where the multiple processing operations are performed during a time interval determined in part by a desired video output rate; and performing a classification analysis at an intermediate time during the time interval, the classification analysis yielding tag data that is used to dynamically vary one or more of the multiple processing operations, and where the tag data is generated on a per-pixel basis to enable pixel by pixel variation of the multiple processing operations. - View Dependent Claims (24, 25, 26, 27, 28, 29, 30, 31, 32)
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33. A method of processing video data, comprising:
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receiving input pixels to be processed; performing multiple processing operations on the input pixels, where the multiple processing operations are performed during a time interval determined in part by a desired video output rate; and repeatedly performing a classification analysis during the time interval as the input pixels are changed by the multiple processing operations, where results of the repeated analyses are used to dynamically vary one or more of the multiple processing operations. - View Dependent Claims (34, 35, 36, 37, 38, 39, 40, 45)
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41-44. -44. (canceled)
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46. An integrated circuit, comprising:
logic circuitry instantiated in silicon, the logic circuitry being configured to; receive input pixels to be processed; perform multiple processing operations on the input pixels, where the multiple processing operations are performed during a time interval determined in part by a desired video output rate; and repeatedly perform a classification analysis during the time interval as pixels are changed by the multiple processing operations, where results of the repeated analyses are used to dynamically vary one or more of the multiple processing operations.
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47-77. -77. (canceled)
Specification