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ARCHITECTURE USING INTEGRATED BACKUP CONTROL AND PROTECTION HARDWARE

  • US 20110087343A1
  • Filed: 06/01/2010
  • Published: 04/14/2011
  • Est. Priority Date: 10/09/2009
  • Status: Active Grant
First Claim
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1. An electronic control configuration, comprising:

  • at least one secondary microprocessor operable to control a device, the at least one secondary microprocessor assuming protection control of the device responsive to a first type of failure by transmitting a protection control signal to a first effector, the at least one secondary microprocessor assuming backup control of the device responsive to a second type of failure by transmitting a backup control signal to a second effector, wherein the backup control functionality of the at least one secondary microprocessor can be selectively disabled.

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