Power Consumption Reduction In A Multiprocessor System

• US 20110087909A1
• Filed: 12/21/2010
• Published: 04/14/2011
• Est. Priority Date: 09/22/2006
• Status: Active Grant

• Current Assignee: Sony Computer Entertainment Incorporated (Sony Group Corp.)
• Original Assignee: Sony Computer Entertainment Incorporated (Sony Group Corp.)
• Inventors: Kanakogi, Tomochika
• Granted Patent: US 9,058,164 B2
• Time in Patent Office: Days
• US Class Current: 713/322
• CPC Class Codes: G06F 1/3203 Power management, i.e. event-based initiation of a power-saving mode
• CPC Class Codes: G06F 1/324 by lowering clock frequency
• CPC Class Codes: G06F 9/526 Mutual exclusion algorithms
• CPC Class Codes: Y02D 10/00 Energy efficient computing, e.g. low power processors, power management or thermal management

Abstract

Methods and apparatus provide for reducing power consumption by decreasing operating frequencies of waiting processors in a multiprocessor system. Power consumption may be reduced by having a processor enter a low frequency mode when the processor is in a loop waiting for data that have been locked by another processor. The frequency of operation of the waiting processor may be reduced to a fraction (one half, one quarter, etc.) of the normal, initial clock frequency. The multiprocessor system may monitor a number of times (loop count) that a waiting processor takes the wait loop and compare the number to a threshold. When the loop count is greater than or equal to the threshold, the clock frequency of the waiting processor is reduced. When the waiting processor ceases to wait and does not take the wait loop branch (e.g., because the other processor has released the lock on the data), the loop count is reset to zero and the frequency of operation of waiting processor is increased to an increased frequency, such as the normal, initial level.

Claims

1. A method of reducing power consumption of a processing system having a first processor operating at a first frequency and a second processor operating at a second frequency, the method comprising:

reducing the second frequency from a second initial frequency to a second reduced frequency during a waiting period in which the second processor is waiting for data to become available that the first processor has locked.

2. The method of claim 1, further comprising:

counting a sequence of wait loops taken by the second processor while waiting for the data to become available, each wait loop in the sequence increasing a loop count by one;

comparing the loop count to a threshold value; and

reducing the second frequency when the loop count equals or exceeds the threshold value.

3. The method of claim 2, further comprising:

keeping the loop count at zero while the second processor is not in a sequence of wait loops; and

keeping the second frequency at the second initial frequency when the loop count is zero.

4. The method of claim 2, further comprising:

resetting the loop count to zero when the sequence of wait loops ends because the second processor does not take the wait loop branch; and

increasing the second frequency from the second reduced frequency to a second increased frequency when the loop count is reset to zero;

wherein the second increased frequency is greater than the second reduced frequency and is either less than, equal to or greater than the second initial frequency.

5. The method of claim 4, wherein:

monitoring availability of the data;

identifying when the first processor releases the lock on the data that caused the waiting processor to wait; and

causing the second processor not to take the wait loop branch when the first processor releases the lock on the data.

6. The method of claim 1, further comprising:

tracking waiting data relating to the second processor waiting for data to become available;

analyzing the waiting data to create a waiting data analysis outcome; and

determining the second frequency in view of the waiting data analysis outcome.

7. The method of claim 1, further comprising:

increasing the second frequency to a second increased frequency from the second reduced frequency when the waiting period ends.

8. The method of claim 7, wherein at least one of:

increasing the second frequency includes restoring the second frequency to the second initial frequency from the second reduced frequency when the waiting period ends; and

the second frequency is increased progressively.

9. The method of claim 1, wherein:

the second frequency is reduced progressively as the waiting period lengthens.

10. A power consumption reduction tool comprising:

a waiting period monitor;

a frequency adjuster;

an availability monitor; and

a controller in communication with the waiting period monitor, the frequency adjuster and the availability monitor, wherein;

each of the waiting period monitor, frequency adjuster, availability monitor, and controller are couplable to a processing system having a first processor operating at a first frequency and a second processor operating at a second frequency;

wherein the waiting period monitor is operable to measure a waiting period in which the second processor is waiting for data to become available that the first processor has locked;

wherein the availability monitor is operable to determine an availability status of the data as available or not available; and

wherein the controller is operable to cause the frequency adjuster to reduce the second frequency from a second initial frequency to a second reduced frequency during the waiting period.

11. The power consumption reduction tool of claim 10, wherein:

the waiting period monitor comprises a loop count monitor;

the loop count monitor is operable to count a sequence of wait loops taken by the second processor while waiting for the data to become available, each wait loop in the sequence increasing a loop count by one;

the controller is operable to compare the loop count to a threshold value; and

the controller is operable to cause the frequency adjuster to reduce the second frequency when the loop count equals or exceeds the threshold value.

12. The power consumption reduction tool of claim 11, wherein:

the loop count monitor is operable to keep the loop count at zero while the second processor is not in a sequence of wait loops; and

the controller is operable to keep the second frequency at the second initial frequency when the loop count is zero.

13. The power consumption reduction tool of claim 11, wherein:

the controller is operable to reset the loop count to zero when the sequence of wait loops ends because the second processor does not take the wait loop branch; and

the controller is operable to cause the frequency adjuster to increase the second frequency from the second reduced frequency to a second increased frequency when the loop count is reset to zero;

wherein the second increased frequency is greater than the second reduced frequency and is either less than, equal to or greater than the second initial frequency.

14. The power consumption reduction tool of claim 10, wherein:

the waiting period monitor comprises a first software component;

the frequency adjuster comprises a second software component;

the availability monitor comprises a third software component; and

the controller comprises a fourth software component.

15. The power consumption reduction tool of claim 14, wherein:

the first, second, third and fourth software components are executable on the processing system.

16. The power consumption reduction tool of claim 10, wherein at least one of:

the controller further is operable to cause the frequency adjuster to increase the second frequency to a second increased frequency from the second reduced frequency when the data become available;

increasing the second frequency includes restoring the second frequency to the second initial frequency from the second reduced frequency when the waiting period ends;

the second frequency is increased progressively; and

the second frequency is reduced progressively as the waiting period lengthens.

17. A non-transitory, computer-readable storage medium containing computer-executable instructions capable of causing a processing system to perform actions for reducing power consumption of the processing system having a first processor operating at a first frequency and a second processor operating at a second frequency, the actions comprising:

reducing the second frequency from a second initial frequency to a second reduced frequency during a waiting period in which the second processor is waiting for data to become available that the first processor has locked.

18. The computer-readable storage medium of claim 17, the actions further comprising:

counting a sequence of wait loops taken by the second processor while waiting for the data to become available, each wait loop in the sequence increasing a loop count by one;

comparing the loop count to a threshold value; and

reducing the second frequency when the loop count equals or exceeds the threshold value.

19. The computer-readable storage medium of claim 17, the actions further comprising:

keeping the loop count at zero while the second processor is not in a sequence of wait loops; and

keeping the second frequency at the second initial frequency when the loop count is zero.

20. The computer-readable storage medium of claim 17, the actions further comprising:

resetting the loop count to zero when the sequence of wait loops ends because the second processor does not take the wait loop branch; and

increasing the second frequency from the second reduced frequency to a second increased frequency when the loop count is reset to zero;

wherein the second increased frequency is greater than the second reduced frequency and is either less than, equal to or greater than the second initial frequency.

21. The computer-readable storage medium of claim 20, the actions further comprising:

monitoring availability of the data;

identifying when the first processor releases the lock on the data that caused the waiting processor to wait; and

causing the second processor not to take the wait loop branch when the first processor releases the lock on the data.

22. The computer-readable storage medium of claim 17, the actions further comprising:

tracking waiting data relating to the second processor waiting for data to become available;

analyzing the waiting data to create a waiting data analysis outcome; and

determining the second frequency in view of the waiting data analysis outcome.

23. The computer-readable storage medium of claim 17, the actions further comprising:

increasing the second frequency to a second increased frequency from the second reduced frequency when the waiting period ends.

24. The computer-readable storage medium of claim 23, wherein at least one of:

increasing the second frequency includes restoring the second frequency to the second initial frequency from the second reduced frequency when the waiting period ends;

the second frequency is increased progressively; and

the second frequency is reduced progressively as the waiting period lengthens.