DATA WRITING METHOD FOR A FLASH MEMORY, AND CONTROLLER AND STORAGE SYSTEM USING THE SAME

• US 20110087950A1
• Filed: 11/19/2009
• Published: 04/14/2011
• Est. Priority Date: 10/12/2009
• Status: Active Grant

• Current Assignee: Phison Electronics Corporation
• Original Assignee: Phison Electronics Corporation
• Inventors: Shen, Yu-Chung, Wu, Chung-Lin, Yu, Hsiang-Hsiung, Huang, Yi-Hsiang
• Granted Patent: US 8,806,301 B2
• Time in Patent Office: Days
• US Class Current: 714/773
• CPC Class Codes: G06F 11/1072 in multilevel memories
• CPC Class Codes: G06F 12/0246 in block erasable memory, e.g. flash memory
• CPC Class Codes: G11C 16/10 Programming or data input circuits
• CPC Class Codes: G11C 2029/0411 Online error correction
• CPC Class Codes: G11C 29/82 for EEPROMs

Abstract

A data writing method for writing data from a host system into a flash memory chip is provided, and the flash memory chip have a plurality of physical blocks. The method includes receiving a host writing command and write data thereof, and executing the host writing command. The method also includes giving a data program command for writing the write data into one of the physical blocks to the flash memory chip, and giving a command for determining whether data stored in the physical block has any error bit. Accordingly, the method can effectively ensure the correctness of data to be written into the flash memory chip.

Claims

1. A data writing method, for writing data from a host system into a flash memory chip, wherein the flash memory chip includes a plurality of physical blocks, the data writing method comprising:

configuring a flash memory controller;

receiving a host write command and write data corresponding to the host write command from the host system and executing the host write command by the flash memory controller;

giving a data program command to the flash memory chip to write the write data into one of the physical blocks during the host writing command is executed; and

giving a command to the flash memory chip to determine whether at least portion of data stored in the one of the physical blocks has at least one error bit during the host writing command is executed.

2. The data writing method according to claim 1, wherein the flash memory controller has an error checking and correcting unit,

wherein the step of giving the command to the flash memory chip to determine whether the at least portion of data stored in the one of the physical blocks has the at least one error bit during the host writing command is executed comprises:

giving a read command to the flash memory chip to read data from the one of the physical blocks; and

determining whether the at least portion of data stored in the one of the physical blocks has the at least one error bit according to the read data through the error checking and correcting unit.

3. The data writing method according to claim 1, wherein the step of determining whether the at least portion of data stored in the one of the physical blocks has the at least one error bit comprises:

only determining whether data stored in the one of the physical blocks and corresponding to the host write command has the at least one error bit.

4. The data writing method according to claim 2, wherein each of the physical blocks has a plurality of physical pages, and the data writing method further comprises:

when the at least portion of data stored in one of the physical pages in the one of the physical blocks has the at least one error bit and the number of the at least one error bit is larger than the maximum number of error correcting bits of the error checking and correcting unit, moving data stored in the other physical pages in the one of the physical blocks to another physical block among the physical blocks and marking the one of the physical blocks as a bad physical block.

5. The data writing method according to claim 2, further comprising:

sending a write error message to the host system by the flash memory controller when the at least portion of data in the one of the physical blocks has the at least one error bit and is corresponding to the host write command.

6. The data writing method according to claim 2, wherein each of the physical blocks has a plurality of physical pages, and the data writing method further comprises:

when the at least portion of data stored in one of the physical pages in the one of the physical blocks has the at least one error bit and the number of the at least one error bit is not larger than the maximum number of error correcting bits of the error checking and correcting unit and is larger than an error bit threshold value, moving data stored in the one of the physical block to another physical block among the physical blocks and marking the one of the physical block as a bad physical block.

7. The data writing method according to claim 2, wherein each of the physical blocks has a plurality of physical pages, and the data writing method further comprises:

when the at least portion of data stored in one of the physical pages in the one of the physical blocks has the at least one error bit and the number of the at least one error bit is not larger than an error bit threshold value, marking the one of the physical block as an unreliable physical block.

8. The data writing method according to claim 7 further comprises:

using an unreliable physical block table to record the unreliable physical block.

9. The data writing method according to claim 1, wherein the step of giving the command to the flash memory chip to determine whether the at least portion of data stored in the one of the physical blocks has the at least one error bit comprises:

giving a read command to the flash memory chip to read data corresponding to the host write command from the one of the physical blocks;

comparing the read data and the write data to determine whether the read data is identical to the write data; and

determining the data stored in the one of the physical blocks and corresponding to the host write command does not has the at least one error bit when the read data is identical to the write data, and determining the data stored in the one of the physical blocks and corresponding to the host write command has the at least one error bit when the read data is not identical to the write data.

10. The data writing method according to claim 1, wherein the flash memory chip has an error checking and correcting unit, and

wherein the step of giving the command to the flash memory chip to determine whether the at least portion of data stored in the one of the physical blocks has the at least one error bit comprises:

giving a write confirm command to the flash memory chip; and

determining whether the at least portion of data stored in the one of the physical blocks has the at least one error bit according to the write confirm command through the error checking and correcting unit.

11. A flash memory controller, for writing data from a host system into a flash memory chip, wherein the flash memory chip includes a plurality of physical blocks, the flash memory controller comprising:

a microprocessor unit;

a flash memory interface unit, coupled to the microprocessor unit, and configured to connect to the flash memory chip;

a host interface unit, coupled to the microprocessor unit and configured to receive a host write command and write data corresponding to the host write command from the host system; and

a memory management unit, coupled to the microprocessor unit and configured to give a data program command to the flash memory chip to write the write data into one of the physical blocks during the host writing command is executed,

wherein the memory management unit gives a command to the flash memory chip to determine whether at least portion of data stored in the one of the physical blocks has at least one error bit during the host writing command is executed.

12. The flash memory controller according to claim 11, further comprising an error checking and correcting unit,

wherein the memory management unit gives a read command to the flash memory chip to read data from the one of the physical blocks and the error checking and correcting unit determines whether the at least portion of data stored in the one of the physical blocks has the at least one error bit according to the read data during the host writing command is executed.

13. The flash memory controller according to claim 11, wherein the memory management unit only determines whether data stored in the one of the physical blocks and corresponding to the host write command has the at least one error bit.

14. The flash memory controller according to claim 12, wherein each of the physical blocks has a plurality of physical pages, and

wherein when the at least portion of data stored in one of the physical pages in the one of the physical blocks has the at least one error bit and the number of the at least one error bit is larger than the maximum number of error correcting bits of the error checking and correcting unit, the memory management unit moves data stored in the other physical pages in the one of the physical block to another physical block among the physical blocks and marks the one of the physical block as a bad physical block.

15. The flash memory controller according to claim 12, wherein when the at least portion of data in the one of the physical blocks has the at least one error bit and is corresponding to the host write command, the memory management unit sends a write error message to the host system by the memory management unit.

16. The flash memory controller according to claim 12, wherein each of the physical blocks has a plurality of physical pages, and

wherein when the at least portion of data stored in one of the physical pages in the one of the physical blocks has the at least one error bit and the number of the at least one error bit is not larger than the maximum number of error correcting bits of the error checking and correcting unit and is larger than an error bit threshold value, the memory management unit moves data stored in the one of the physical blocks to another physical block among the physical blocks and marks the one of the physical blocks as a bad physical block.

17. The flash memory controller according to claim 12, wherein each of the physical blocks has a plurality of physical pages, and

wherein when the at least portion of data stored in one of the physical pages in the one of the physical blocks has the at least one error bit and the number of the at least one error bit is not larger than an error bit threshold value, the memory management unit marks the one of the physical blocks as an unreliable physical block.

18. The flash memory controller according to claim 11, wherein the memory management unit gives a read command to the flash memory chip to read data corresponding to the host write command from the one of the physical blocks, and compares the read data and the write data to determine whether the read data is identical to the write data,

wherein the memory management unit determines the data stored in the one of the physical blocks and corresponding to the host write command does not has the at least one error bit when the read data is identical to the write data, and the memory management unit determines the data stored in the one of the physical blocks and corresponding to the host write command has the at least one error bit when the read data is not identical to the write data.

19. The flash memory controller according to claim 11, wherein the flash memory chip has an error checking and correcting unit,

wherein the memory management unit gives a write confirm command to the flash memory chip, and the error checking and correcting unit determines whether the at least portion of data stored in the one of the physical blocks has the at least one error bit according to the write confirm command.

20. A flash memory storage system, comprising:

a flash memory chip, having a plurality of physical blocks;

a connector, configured to connect to a host system and to receive a host write command and write data corresponding to the host write command from the host system; and

a flash memory controller, coupled to the flash memory chip and the connector, and configured to give a data program command to the flash memory chip to write the write data into one of the physical blocks during the host writing command is executed,

wherein the flash memory controller gives a command to the flash memory chip to determine whether at least portion of data stored in the one of the physical blocks has at least one error bit during the host writing command is executed.

21. The flash memory storage system according to claim 20, wherein the flash memory controller has an error checking and correcting unit,

wherein the flash memory controller gives a read command to the flash memory chip to read data from the one of the physical blocks and the error checking and correcting unit determines whether the at least portion of data stored in the one of the physical blocks has the at least one error bit according to the read data during the host writing command is executed.

22. The flash memory storage system according to claim 21, wherein each of the physical blocks has a plurality of physical pages, and

wherein when the at least portion of data stored in one of the physical pages in the one of the physical blocks has the at least one error bit and the number of the at least one error bit is larger than the maximum number of error correcting bits of the error checking and correcting unit, the flash memory controller moves data stored in the other physical pages in the one of the physical blocks to another physical block among the physical blocks and marks the one of the physical blocks as a bad physical block.

23. The flash memory storage system according to claim 21, wherein when the at least portion of data in the one of the physical blocks has the at least one error bit and is corresponding to the host write command, the flash memory controller sends a write error message to the host system by the flash memory controller.

24. The flash memory storage system according to claim 21, wherein each of the physical blocks has a plurality of physical pages, and

wherein when the at least portion of data stored in one of the physical pages in the one of the physical blocks has the at least one error bit and the number of the at least one error bit is not larger than the maximum number of error correcting bits of the error checking and correcting unit and is larger than an error bit threshold value, the flash memory controller moves data stored in the one of the physical blocks to another physical block among the physical blocks and marks the one of the physical blocks as a bad physical block.

25. The flash memory storage system according to claim 21, wherein each of the physical blocks has a plurality of physical pages, and

wherein when the at least portion of data stored in one of the physical pages in the one of the physical blocks has the at least one error bit and the number of the at least one error bit is not larger than an error bit threshold value, the flash memory controller marks the one of the physical blocks as an unreliable physical block.