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PIXEL CIRCUIT AND PIXEL DRIVING METHOD

  • US 20110090137A1
  • Filed: 10/15/2010
  • Published: 04/21/2011
  • Est. Priority Date: 10/16/2009
  • Status: Active Grant
First Claim
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1. A pixel circuit, comprising:

  • an organic light emitting diode (OLED);

    a storage capacitor having a first terminal and a second terminal;

    a driving transistor for driving the OLED, wherein a source electrode of the driving transistor is electrically coupled to the first terminal of the storage capacitor, and a drain electrode of the driving transistor is electrically coupled to the OLED;

    a first switching transistor, wherein a gate electrode of the first switching transistor is electrically coupled to a first scanning line, a source electrode of the first switching transistor is electrically coupled to the gate electrode of the driving transistor, and a drain electrode of the first switching transistor is electrically coupled to a data line;

    a second switching transistor, wherein a gate electrode of the second switching transistor is electrically coupled to the first scanning line, a source electrode of the second switching transistor is electrically coupled to a first predetermined voltage, and a drain electrode of the second switching transistor is electrically coupled to the first terminal of the storage capacitor;

    a third switching transistor, wherein a gate electrode of the third switching transistor is electrically coupled to a second scanning line, a source electrode of the third switching transistor is electrically coupled to a second predetermined voltage, a drain electrode of the third switching transistor is electrically coupled to the second terminal of the storage capacitor; and

    a fourth switching transistor, wherein a gate electrode of the fourth switching transistor is electrically coupled to the second scanning line, a source electrode of the fourth switching transistor is electrically coupled to the gate electrode of the driving transistor, and the second source/drain electrode of the fourth switching transistor is electrically coupled to the second terminal of the storage capacitor;

    wherein gate-on voltages of the first and the second switching transistors are in opposite phases, and gate-on voltages of the third and the fourth switching transistors are in opposite phases.

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