Display Device and Thin Film Transistor Array Substrate and Thin Film Transistor thereof

• US 20110095285A1
• Filed: 02/03/2010
• Published: 04/28/2011
• Est. Priority Date: 10/26/2009
• Status: Active Grant

• Current Assignee: E Ink Holdings Incorporated
• Original Assignee: Prime View International Company Limited (E Ink Holdings Incorporated)
• Inventors: Lin, Tung-Liang, Lan, Wei-Chou, Wang, Henry, SHU, Fang-An, Chen, Lee-Tyng
• Granted Patent: US 8,723,172 B2
• Time in Patent Office: Days
• US Class Current: 257/43
• CPC Class Codes: H01L 27/1225 with semiconductor materials not belonging to the group IV of the periodic table, e.g. InGaZnO
• CPC Class Codes: H01L 29/7869 having a semiconductor body comprising an oxide semiconductor material, e.g. zinc oxide, copper aluminium oxide, cadmium stannate

Abstract

A display device including a thin film transistor array substrate, transparent electrode substrate and a display medium layer disposed therebetween is provided. The thin film transistor array substrate includes a plurality of thin film transistors with an oxide semiconductor layer respectively. In each thin film transistor, a gate electrode and a gate insulating layer are disposed on a substrate sequentially and the gate electrode is covered by the gate insulating layer. The oxide semiconductor layer is conformably covering on the gate insulating layer and has a channel region located above the gate electrode. A source electrode and a drain electrode of each thin film transistor are disposed on the oxide semiconductor layer and at one side of the channel region respectively. Since the oxide semiconductor layer is made of transparent material, the patterning process of the oxide semiconductor layer can be omitted during the manufacturing process of the reflective display device. Thus, the cost and time-consumed of manufacturing process of the reflective display device can be reduced.

Claims

1. A thin film transistor, comprising:

a gate electrode disposed on a first substrate;

a gate insulating layer disposed on the first substrate and covered the gate electrode;

an oxide semiconductor layer conformably disposed above the gate insulating layer and has a channel region located above the gate electrode;

a source electrode disposed above the gate insulating layer and located at one side of the channel region; and

a drain electrode disposed above the gate insulating layer and located at another side of the channel region.

2. The thin film transistor as claimed in claim 1, wherein the oxide semiconductor layer is conformably disposed on the gate insulating layer, the source electrode and the drain electrode are disposed on the oxide semiconductor layer.

3. The thin film transistor as claimed in claim 1, wherein the oxide semiconductor layer is conformably disposed on the source electrode and the drain electrode, the channel region is disposed between the source electrode and the drain electrode.

4. The thin film transistor as claimed in claim 1, wherein materials of the source electrode and the drain electrode comprise metal materials or transparent conductive materials.

5. The thin film transistor as claimed in claim 1, further comprising:

a first ohmic contact layer disposed between the source electrode and the oxide semiconductor layer; and

a second ohmic contact layer disposed between the drain electrode and the oxide semiconductor layer.

6. The thin film transistor as claimed in claim 1, wherein materials of the oxide semiconductor layer comprise indium gallium zinc oxide or indium zinc oxide.

7. The thin film transistor as claimed in claim 1, wherein materials of the gate electrode comprise metal materials or transparent conductive materials.

8. A thin film transistor array substrate, comprising:

a first substrate;

a plurality of data lines disposed on the first substrate and parallel to each other;

a plurality of scan lines disposed on the first substrate and intersect the data lines to define a plurality of pixel regions on the first substrate;

a plurality of thin film transistors disposed within corresponding one of the pixel regions and electrically connected to the corresponding one of the data lines and corresponding one of the scan lines, each thin film transistor comprises;

a gate electrode disposed on a first substrate;

a gate insulating layer disposed on the first substrate and covered the gate electrode;

an oxide semiconductor layer conformably disposed above the gate insulating layer and has a channel region located above the gate electrode;

a source electrode disposed above the gate insulating layer and located at one side of the channel region;

a drain electrode disposed above the gate insulating layer and located at another side of the channel region;

a protective layer covered the first substrate and has a plurality of contact holes exposing a portion of corresponding drain electrode respectively; and

a plurality of pixel electrodes respectively disposed within corresponding one of the pixel regions, each pixel electrode is correspondingly filled into one of the contact holes and electrically connected to the corresponding drain electrode.

9. The thin film transistor array substrate as claimed in claim 8, wherein for each thin film transistor, the oxide semiconductor layer is conformably disposed on the gate insulating layer, the source electrode and the drain electrode are disposed on the oxide semiconductor layer.

10. The thin film transistor array substrate as claimed in claim 8, wherein for each thin film transistor, the oxide semiconductor layer is conformably disposed on the source electrode and the drain electrode, the channel region is disposed between the source electrode and the drain electrode.

11. The thin film transistor array substrate as claimed in claim 8, wherein materials of the source electrode and the drain electrode comprise metal materials or transparent conductive materials.

12. The thin film transistor array substrate as claimed in claim 8, wherein each thin film transistor further comprising:

a first ohmic contact layer disposed between the source electrode and the oxide semiconductor layer; and

a second ohmic contact layer disposed between the drain electrode and the oxide semiconductor layer.

13. The thin film transistor array substrate as claimed in claim 8, wherein materials of the protective layer comprise silica or resin.

14. The thin film transistor array substrate as claimed in claim 8, wherein materials of the oxide semiconductor layer comprise indium gallium zinc oxide or indium zinc oxide.

15. The thin film transistor array substrate as claimed in claim 8, wherein materials of the gate electrode comprise metal materials or transparent conductive materials.

16. The thin film transistor array substrate as claimed in claim 8, wherein materials of the first substrate comprise plastic or glass.

17. The thin film transistor array substrate as claimed in claim 16, wherein materials of the first substrate comprise polyimide, polyethylene terephthalate, polyethylene naphthalate or polymethacrylate.

18. A display device, comprising:

a thin film transistor array substrate, comprising;

a first substrate;

a plurality of data lines disposed on the first substrate and parallel to each other;

a plurality of scan lines disposed on the first substrate and substantially perpendicular to the data lines for defining a plurality of pixel regions on the first substrate;

a plurality of thin film transistors disposed within corresponding one of the pixel regions and electrically connected to the corresponding one of the data lines and corresponding one of the scan lines, each thin film transistor comprises;

a gate electrode disposed on a first substrate;

a gate insulating layer disposed on the first substrate and covered the gate electrode;

an oxide semiconductor layer conformably disposed above the gate insulating layer and has a channel region located above the gate electrode;

a source electrode disposed above the gate insulating layer and located at one side of the channel region;

a drain electrode disposed above the gate insulating layer and located at another side of the channel region;

a protective layer covered the first substrate and has a plurality of contact holes exposing a portion of corresponding drain electrode respectively;

a plurality of pixel electrodes respectively disposed within corresponding one of the pixel regions, each pixel electrode is correspondingly filled into one of the contact holes and electrically connected to the corresponding drain electrode;

a transparent electrode substrate, comprising;

a second substrate disposed above the thin film transistor array substrate;

a transparent electrode disposed on the second substrate and between the thin film transistor array substrate and the second substrate; and

a display medium layer disposed between the thin film transistor array substrate and the transparent electrode substrate.

19. The display device as claimed in claim 18, wherein for each thin film transistor, the oxide semiconductor layer is conformably disposed on the gate insulating layer, the source electrode and the drain electrode are disposed on the oxide semiconductor layer.

20. The display device as claimed in claim 18, wherein for each thin film transistor, the oxide semiconductor layer is conformably disposed on the source electrode and the drain electrode, the channel region is disposed between the source electrode and the drain electrode.

21. The display device as claimed in claim 18, wherein materials of the source electrode and the drain electrode comprise metal materials or transparent conductive materials.

22. The display device as claimed in claim 18, wherein each thin film transistor further comprising:

a first ohmic contact layer disposed between the source electrode and the oxide semiconductor layer; and

a second ohmic contact layer disposed between the drain electrode and the oxide semiconductor layer.

23. The display device as claimed in claim 18, wherein materials of the protective layer comprise silica or resin.

24. The display device as claimed in claim 18, wherein materials of the oxide semiconductor layer comprise indium gallium zinc oxide or indium zinc oxide.

25. The display device as claimed in claim 18, wherein materials of the gate electrode comprise metal materials or transparent conductive materials.

26. The display device as claimed in claim 18, wherein the display medium layer comprises microcapsule electrophoretic layer, microcup electrophoretic layer, cholesteric liquid crystal layer, electro-wetting layer or quick response-liquid powder layer.

27. The display device as claimed in claim 18, wherein the transparent electrode substrate further comprises a color filter film disposed on the second substrate and located between the transparent electrode and the second substrate.

28. The display device as claimed in claim 18, wherein materials of the first substrate comprise plastic or glass.

29. The display device as claimed in claim 18, wherein materials of the first substrate comprise polyimide, polyethylene terephthalate, polyethylene naphthalate or polymethacrylate.