Single Crystal Silicon Sensor with Additional Layer and Method of Producing the Same

• US 20110095384A1
• Filed: 01/06/2011
• Published: 04/28/2011
• Est. Priority Date: 03/02/2004
• Status: Active Grant

• Current Assignee: Analog Devices, Inc.
• Original Assignee: Analog Devices, Inc.
• Inventors: Brosnihan, Timothy J., Nunan, Thomas Kieran
• Granted Patent: US 8,227,286 B2
• Time in Patent Office: Days
• US Class Current: 257/415
• CPC Class Codes: G01P 15/0802 Details
• CPC Class Codes: G01P 15/125 by capacitive pick-up

Abstract

A SOI-based MEMS device has a base layer, a device layer, and an insulator layer between the base layer and the device layer. The device also has a deposited layer having a portion that is spaced from the device layer. The device layer is between the insulator layer and the deposited layer.

Claims

1. A MEMS device comprising:

a single crystal silicon layer having a top surface, the single crystal silicon layer also having a movable structure; and

a deposited additional layer adjacent to the top surface of the single crystal silicon layer, the deposited additional layer having a portion that is spaced from the top surface, the deposited layer forming a stationary actuator for actuating the movable structure.

2. The MEMS device as defined by claim 1 wherein the deposited additional layer forms an air space between additional deposited layer and the top surface of the single crystal silicon layer.

3. The MEMS device as defined by claim 1 wherein the single crystal silicon layer includes circuitry.

4. The MEMS device as defined by claim 1 wherein the structure includes inertial sensing structure.

5. A method of forming an SOI-based MEMS device, the method comprising:

providing a SOI-based MEMS wafer having a top face;

depositing a sacrificial layer on the top face; and

depositing an additional MEMS layer on the sacrificial layer.

6. The method as defined by claim 5 wherein the additional MEMS layer is comprised of a material having a deposition temperature that is less than about 450 C.

7. The method as defined by claim 5 further comprising removing at least a portion of the sacrificial layer.

8. The method as defined by claim 5 wherein the additional MEMS layer forms a cap for at least a portion of the top face of the SOI-based MEMS wafer.

9. The method as defined by claim 5 further comprising applying surface micromachining processes to the additional MEMS layer.

10. A method of forming a MEMS inertial sensor, the method comprising:

providing a single crystal wafer having a top face;

depositing a sacrificial layer on the top face; and

depositing an additional MEMS layer on the sacrificial layer.

11. The method as defined by claim 10 further comprising removing at least a portion of the sacrificial layer.

12. The method as defined by claim 10 further comprising applying surface micromachining processes to the additional MEMS layer.