BROADCAST RECEIVER SYSTEM
First Claim
1. An interface circuit configured to connect between (a) a broadcast receiver tuner and associated circuitry for the receiving and processing of broadcast radio frequency signals, and (b) a general purpose computer device programmed with software demodulation code configured to engage a general purpose processor in signal demodulation functions, the interface circuit comprising:
- a data interface comprising a packetization buffer connected to receive (i) digital signal sample data from a signal path of the tuner and associated circuitry and (ii) indications of control settings which are applied to one or more configurable components during taking of the sample data, said packetization buffer being operable to construct packets comprising blocks of sample data and header information carrying said control settings indications;
a control interface configured to receive control instructions from tuner control code running on the general purpose computer device; and
a microcontroller operable to receive the control instructions from the control interface and distribute corresponding control settings to configurable components of the tuner and associated circuitry, said microcontroller also being operable to supply indications of relevant control settings to said packetization buffer.
1 Assignment
0 Petitions
Accused Products
Abstract
An interface circuit configured to connect between (a) a broadcast receiver tuner and associated circuitry for the receiving and processing of broadcast radio frequency signals, and (b) a general purpose computer device programmed with software demodulation code configured to engage a general purpose processor in signal demodulation functions, the interface circuit comprising: a data interface comprising a packetisation buffer connected to receive (i) digital signal sample data from a signal path of the tuner and associated circuitry and (ii) indications of control settings which are applied to one or more configurable components during taking of the sample data, said packetisation buffer being operable to construct packets comprising blocks of sample data and header information carrying said control settings indications; a control interface configured to receive control instructions from tuner control code running on the general purpose computer device; and a microcontroller operable to receive the control instructions from the control interface and distribute corresponding control settings to configurable components of the tuner and associated circuitry, said microcontroller also being operable to supply indications of relevant control settings to said packetisation buffer.
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Citations
19 Claims
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1. An interface circuit configured to connect between (a) a broadcast receiver tuner and associated circuitry for the receiving and processing of broadcast radio frequency signals, and (b) a general purpose computer device programmed with software demodulation code configured to engage a general purpose processor in signal demodulation functions, the interface circuit comprising:
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a data interface comprising a packetization buffer connected to receive (i) digital signal sample data from a signal path of the tuner and associated circuitry and (ii) indications of control settings which are applied to one or more configurable components during taking of the sample data, said packetization buffer being operable to construct packets comprising blocks of sample data and header information carrying said control settings indications; a control interface configured to receive control instructions from tuner control code running on the general purpose computer device; and a microcontroller operable to receive the control instructions from the control interface and distribute corresponding control settings to configurable components of the tuner and associated circuitry, said microcontroller also being operable to supply indications of relevant control settings to said packetization buffer. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9)
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10. An interface implemented at least partly in computer code and configured to connect between (a) a demodulator implemented in software on the general purpose computing device and (b) an interface circuit associated with a separate hardware tuner for receiving broadcast signals, said interface comprising:
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a data interface for receiving packetized signal sample data including header information comprising control settings indications which are applied during taking of the sample data; a control interface operable to receive control instructions from tuner control code, setting control inputs of configurable tuner components and further operable to forward said control instructions to a complimentary interface associated with the tuner circuitry; tuner control code operable to issue control instructions intended to change a control setting of a configurable component of the tuner circuitry; a log of at least one issued instruction; and a packet monitoring module operable to detect control settings indications for configurable components of the tuner and to compare them with the log to determine when an instruction issued by the tuner control code has been implemented at the configurable component of the tuner circuitry. - View Dependent Claims (14, 16, 17, 18, 19)
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11. An interface implemented at least partly in computer code and configured to connect between (a) a demodulator implemented in software on the general purpose computing device and (b) an interface circuit associated with a separate hardware tuner for receiving broadcast signals, said interface comprising:
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a data interface for receiving packetized signal sample data including header information comprising control settings indications which applied during taking of the sample data; a control interface operable to receive control instructions from tuner control code, setting control inputs of configurable tuner components and further operable to forward said control instructions to a complimentary interface associated with the tuner circuitry; tuner control code operable to issue control instructions intended change a control setting of a configurable component of the tuner circuitry; and a timer module recording time since instruction issue, operable to determine that an instruction issued by the tuner control code has been implemented at the configurable component of the tuner circuitry a predetermined period after issue. - View Dependent Claims (12, 13, 15)
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Specification