METHOD, APPARATUS AND PROGRAM FOR MANUFACTURING SILICON STRUCTURE

• US 20110097903A1
• Filed: 04/08/2009
• Published: 04/28/2011
• Est. Priority Date: 06/18/2008
• Status: Active Grant

• Current Assignee: SPP Technologies Co., Ltd. (Sumitomo Corporation)
• Original Assignee: Sumitomo Precision Products Company Limited (Sumitomo Corporation)
• Inventors: Yamamoto, Takashi, Nozawa, Yoshiyuki
• Granted Patent: US 8,546,265 B2
• Time in Patent Office: Days
• US Class Current: 438/714
• CPC Class Codes: B81B 2203/033 Trenches
• CPC Class Codes: B81C 1/00531 Dry etching
• CPC Class Codes: B81C 1/00619 Forming high aspect ratio structures having deep steep walls
• CPC Class Codes: B81C 1/00626 Processes for achieving a desired geometry not provided for in groups B81C1/00563 - B81C1/00619
• CPC Class Codes: B81C 2201/0132 Dry etching, i.e. plasma etching, barrel etching, reactive ion etching [RIE], sputter etching or ion milling
• CPC Class Codes: B81C 2201/014 by depositing an etch stop layer, e.g. silicon nitride, silicon oxide, metal
• CPC Class Codes: H01L 21/3065 Plasma etching; Reactive-ion etching
• CPC Class Codes: H01L 21/30655 comprising alternated and repeated etching and passivation steps, e.g. Bosch process

Abstract

A method for manufacturing a silicon structure according to the present invention includes, in a so-called dry-etching process wherein gas-switching is employed, the steps of: etching a portion in the silicon region at a highest etching rate under a high-rate etching condition such that the portion does not reach the etch stop layer; subsequently etching under a transition etching condition in which an etching rate is decreased with time from the highest etching rate in the high-rate etching condition; and thereafter, etching the silicon region under a low-rate etching condition of a lowest etching rate in the transition etching condition.

Claims

1. A method for manufacturing a silicon structure, the method comprising, in a process of etching a silicon region in a substrate provided with an etch stop layer with use of plasmas generated by alternately supplying an etching gas and an organic deposit forming gas, the steps of:

etching a portion in the silicon region at a highest etching rate under a high-rate etching condition such that the portion does not reach the etch stop layer,

subsequently etching under a transition etching condition in which an etching rate is decreased with time-dependently from the highest etching rate in the high-rate etching condition; and

thereafter, etching the silicon region under a low-rate etching condition of a lowest etching rate in the transition etching condition.

2. The method for manufacturing a silicon structure according to claim 1, wherein in the transition etching condition, the etching rate is decreased substantially linearly.

3. A program for manufacturing a silicon structure, the program comprising, in a process of etching a silicon region in a substrate provided with an etch stop layer with use of plasmas generated by alternately supplying an etching gas and an organic deposit forming gas, the steps of:

etching a portion in the silicon region at a highest etching rate under a high-rate etching condition such that the portion does not reach the etch stop layer;

subsequently etching under a transition etching condition in which an etching rate is decreased with time from the highest etching rate in the high-rate etching condition; and

thereafter, etching the silicon region under a low-rate etching condition of a lowest etching rate in the transition etching condition.

4. A recording medium having a manufacturing program of claim 3 being stored thereon.

5. An apparatus for manufacturing a silicon structure, comprising:

a control unit for controlling with use of the manufacturing program of claim 3.

6. An apparatus for manufacturing a silicon structure, comprising:

a control unit for controlling with use of the manufacturing program of claim 4.