Methods of Cell Population Distribution Assisted Read Margining

• US 20110099438A1
• Filed: 01/04/2011
• Published: 04/28/2011
• Est. Priority Date: 09/27/2006
• Status: Active Grant

• Current Assignee: SanDisk Technologies LLC (Western Digital Corporation)
• Original Assignee: Sandisk Technologies Incorporated (Western Digital Corporation)
• Inventors: Gonzalez, Carlos J., Guterman, Daniel C.
• Granted Patent: US 8,473,813 B2
• Time in Patent Office: Days
• US Class Current: 714/721
• CPC Class Codes: G11C 16/04 using variable threshold transistors, e.g. FAMOS
• CPC Class Codes: G11C 16/26 Sensing or reading circuits; Data output circuits
• CPC Class Codes: G11C 16/3418 Disturbance prevention or evaluation; Refreshing of disturbed memory data
• CPC Class Codes: G11C 16/3422 Circuits or methods to evaluate read or write disturbance in nonvolatile memory, without steps to mitigate the problem
• CPC Class Codes: G11C 2029/0409 Online test
• CPC Class Codes: G11C 2029/0411 Online error correction
• CPC Class Codes: G11C 29/028 with adaption or trimming of parameters
• CPC Class Codes: G11C 29/42 using error correcting codes [ECC] or parity check
• CPC Class Codes: G11C 29/46 Test trigger logic
• CPC Class Codes: G11C 29/50 Marginal testing, e.g. race, voltage or current testing
• CPC Class Codes: G11C 29/50004 of threshold voltage

Abstract

A memory using techniques to extract the data content of its storage elements, when the distribution of stored states is degraded, is presented. If the distribution of stored states has degraded, secondary evaluations of the memory cells are performed using modified read conditions. Based upon the results of these supplemental evaluations, the memory device determines the read conditions at which to best decide the data stored.

Claims

1. A of method determining the data content of a memory device having a plurality of memory cells each storing one of at least two data states, comprising:

evaluating the memory cells using standard read conditions;

determining whether the evaluation using standard read conditions has an unacceptable level of error;

in response to the evaluation using standard read conditions having an unacceptable level of error, performing evaluations of the memory cells using a plurality of secondary read conditions;

extracting information on the distribution of programmed state populations of the memory cells based on the results of the evaluations using the standard read conditions and the plurality of secondary read conditions; and

determining modified read conditions differing from the standard read conditions at which to evaluate the memory cells to determine their data content based on said information on the distribution of programmed state populations.

2. The method of claim 1, wherein said extracting information on the distribution of programmed state populations of the memory cells includes comparing the number of memory cells evaluated using the standard read conditions, the number of memory cells evaluated using the plurality of secondary read conditions, and the rate of change of the number of memory cells evaluated at the standard and secondary read conditions.

3. The method of claim 1, wherein said determining whether the evaluation using standard read conditions has an unacceptable level of error is based on an error correction code result.

4. The method of claim 1, wherein the modified read conditions are one of said secondary read conditions.

5. The method of claim 1, wherein the modified read conditions are read conditions other than one of standard read conditions and said secondary read conditions.

6. The method of claim 1, wherein the plurality of read conditions use the same bias conditions, but differing reference points.

7. The method of claim 6, wherein said reference points are current levels.

8. The method of claim 6, wherein said reference points are voltage levels.

9. The method of claim 6, wherein said reference points are time values.

10. The method of claim 1, wherein the standard read conditions are a first set of bias conditions and the plurality of secondary read conditions are a plurality of secondary sets of bias conditions.

11. The method of claim 10, wherein the first set of bias conditions and the secondary sets of bias conditions are distinguished from each other by a differing control gate voltage.

12. The method of claim 1, wherein said memory cells are non-volatile memory cells.

13. The method of claim 12, wherein said memory cells are charge storing devices.

14. The method of claim 13, wherein said memory device is a flash memory.

15. The method of claim 1, wherein said memory device includes a memory containing the memory cells and a controller, wherein the extracting information on the distribution of programmed state populations of the memory cells and the determining modified read conditions are performed within the memory.

16. The method of claim 1, wherein said memory device includes a memory containing the memory cells and a controller, wherein the extracting information on the distribution of programmed state populations of the memory cells and the determining modified read conditions are performed by the controller.

17. The method of claim 1, wherein said standard read conditions are established by one or more reference cells.