SEMICONDUCTOR DEVICE

• US 20110101332A1
• Filed: 10/25/2010
• Published: 05/05/2011
• Est. Priority Date: 10/29/2009
• Status: Active Grant

• Current Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Original Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Inventors: YAMAZAKI, Shunpei, KOYAMA, Jun, IMAI, Keitaro
• Granted Patent: US 9,202,546 B2
• Time in Patent Office: Days
• US Class Current: 257/43
• CPC Class Codes: G11C 11/404 with one charge-transfer gate, e.g. MOS transistor, per cell
• CPC Class Codes: G11C 11/405 with three charge-transfer gates, e.g. MOS transistors, per cell
• CPC Class Codes: G11C 16/02 electrically programmable
• CPC Class Codes: H01L 21/8258 the substrate being a semiconductor, using a combination of technologies covered by H01L21/8206, H01L21/8213 , H01L21/822, H01L21/8252, H01L21/8254 or H01L21/8256
• CPC Class Codes: H01L 27/0688 Integrated circuits having a three-dimensional layout
• CPC Class Codes: H01L 27/088 the components being field-effect transistors with insulated gate
• CPC Class Codes: H01L 27/0922 Combination of complementary transistors having a different structure, e.g. stacked CMOS, high-voltage and low-voltage CMOS
• CPC Class Codes: H01L 27/105 including field-effect components
• CPC Class Codes: H01L 27/12 the substrate being other than a semiconductor body, e.g. an insulating body
• CPC Class Codes: H01L 27/1225 with semiconductor materials not belonging to the group IV of the periodic table, e.g. InGaZnO
• CPC Class Codes: H01L 29/7869 having a semiconductor body comprising an oxide semiconductor material, e.g. zinc oxide, copper aluminium oxide, cadmium stannate
• CPC Class Codes: H10B 12/20 DRAM devices comprising floating-body transistors, e.g. floating-body cells
• CPC Class Codes: H10B 41/70 the floating gate being an electrode shared by two or more components

Abstract

The semiconductor device includes: a transistor having an oxide semiconductor layer; and a logic circuit formed using a semiconductor material other than an oxide semiconductor. One of a source electrode and a drain electrode of the transistor is electrically connected to at least one input of the logic circuit, and at least one input signal is applied to the logic circuit through the transistor. The off-current of the transistor is preferably 1×10⁻¹³ A or less.

Claims

1. A semiconductor device comprising:

a transistor including an oxide semiconductor layer; and

a logic circuit formed using a semiconductor material other than an oxide semiconductor,

wherein one of a source electrode and a drain electrode of the transistor is electrically connected to at least one input of the logic circuit,

wherein at least one input signal is applied to the logic circuit through the transistor, and

wherein the transistor is provided above the logic circuit.

2. The semiconductor device according to claim 1, wherein an off-current of the transistor is 1×

10<sup>−

13</sup> A or less.

3. The semiconductor device according to claim 1, wherein a concentration of hydrogen in the oxide semiconductor layer is 5×

10¹⁹ atoms/cm³ or less.

4. A semiconductor device comprising:

a first transistor including a first gate electrode, a first source electrode, and a first drain electrode;

a second transistor including a second gate electrode, a second source electrode, and a second drain electrode; and

a third transistor including a third gate electrode, a third source electrode, and a third drain electrode,

wherein the first transistor and the second transistor are formed using a substrate including a semiconductor material other than an oxide semiconductor;

wherein the third transistor includes an oxide semiconductor layer;

wherein the first drain electrode and the second drain electrode are electrically connected to each other; and

wherein the first gate electrode, the second gate electrode, and one of the third source electrode and the third drain electrode are electrically connected to each other.

5. The semiconductor device according to claim 4, further comprising a capacitor electrically connected to the first gate electrode, the second gate electrode, and the one of the third source electrode and the third drain electrode.

6. The semiconductor device according to claim 4, wherein the first transistor is a p-channel transistor and the second transistor is an n-channel transistor.

7. The semiconductor device according to claim 4,

wherein the other of the third source electrode and the third drain electrode is electrically connected to a signal input wiring;

wherein the first drain electrode and the second drain electrode are electrically connected to a signal output wiring;

wherein the third gate electrode is electrically connected to a gate signal input wiring;

wherein the first source electrode is electrically connected to a wiring for applying a first potential; and

wherein the second source electrode is electrically connected to a wiring for applying a second potential.

8. The semiconductor device according to claim 4,

wherein the first transistor includes:

a first channel formation region formed in the substrate including a semiconductor material other than an oxide semiconductor;

first impurity regions provided to sandwich the first channel formation region;

a first gate insulating layer over the first channel formation region;

the first gate electrode over the first gate insulating layer; and

the first source electrode and the first drain electrode which are electrically connected to the first impurity regions; and

wherein the second transistor includes;

a second channel formation region formed in the substrate including a semiconductor material other than an oxide semiconductor;

second impurity regions provided to sandwich the second channel formation region;

a second gate insulating layer over the second channel formation region;

the second gate electrode over the second gate insulating layer; and

the second source electrode and the second drain electrode which are electrically connected to the second impurity regions.

9. The semiconductor device according to claim 4,

wherein the third transistor includes:

the third gate electrode over the substrate including a semiconductor material other than an oxide semiconductor;

a third gate insulating layer over the third gate electrode;

the oxide semiconductor layer over the third gate insulating layer; and

the third source electrode and the third drain electrode which are electrically connected to the oxide semiconductor layer.

10. The semiconductor device according to claim 4, wherein an off-current of the third transistor is 1×

10<sup>−

13</sup> A or less.

11. The semiconductor device according to claim 4, wherein the substrate including a semiconductor material other than an oxide semiconductor is a single crystal semiconductor substrate or an SOI substrate.

12. The semiconductor device according to claim 4, wherein the semiconductor material other than an oxide semiconductor is silicon.

13. The semiconductor device according to claim 4, wherein the oxide semiconductor layer includes an In—

Ga—

Zn—

O-based oxide semiconductor material.

14. The semiconductor device according to claim 4, wherein the oxide semiconductor layer includes an In₂Ga₂ZnO₇ crystal.

15. The semiconductor device according to claim 4, wherein a concentration of hydrogen in the oxide semiconductor layer is 5×

10¹⁹ atoms/cm³ or less.

16. A semiconductor device comprising:

a first transistor including a first gate electrode, a first source electrode, and a first drain electrode;

a second transistor including a second gate electrode, a second source electrode, and a second drain electrode; and

a third transistor including a third gate electrode, a third source electrode, and a third drain electrode,

wherein the first transistor and the second transistor are formed using a substrate including a semiconductor material other than an oxide semiconductor;

wherein the third transistor includes an oxide semiconductor layer;

wherein the first drain electrode and the second drain electrode are electrically connected to each other;

wherein the first source electrode and the first gate electrode are electrically connected to each other; and

wherein the second gate electrode and one of the third source electrode and the third drain electrode are electrically connected to each other.

17. The semiconductor device according to claim 16, further comprising a capacitor electrically connected to the second gate electrode and the one of the third source electrode and the third drain electrode.

18. The semiconductor device according to claim 16, wherein the first transistor is an n-channel transistor and the second transistor is an n-channel transistor.

19. The semiconductor device according to claim 16,

wherein the other of the third source electrode and the third drain electrode is electrically connected to a signal input wiring;

wherein the first drain electrode and the second drain electrode are electrically connected to a signal output wiring;

wherein the third gate electrode is electrically connected to a gate signal input wiring;

wherein the first source electrode is electrically connected to a wiring for applying a first potential; and

the second source electrode is electrically connected to a wiring for applying a second potential.

20. The semiconductor device according to claim 16,

wherein the first transistor includes:

a first channel formation region formed in the substrate including a semiconductor material other than an oxide semiconductor;

first impurity regions provided to sandwich the first channel formation region;

a first gate insulating layer over the first channel formation region;

the first gate electrode over the first gate insulating layer; and

the first source electrode and the first drain electrode which are electrically connected to the first impurity regions; and

wherein the second transistor includes;

a second channel formation region formed in the substrate including a semiconductor material other than an oxide semiconductor;

second impurity regions provided to sandwich the second channel formation region;

a second gate insulating layer over the second channel formation region;

the second gate electrode over the second gate insulating layer; and

the second source electrode and the second drain electrode which are electrically connected to the second impurity regions.

21. The semiconductor device according to claim 16,

wherein the third transistor includes:

the third gate electrode over the substrate including a semiconductor material other than an oxide semiconductor;

a third gate insulating layer over the third gate electrode;

the oxide semiconductor layer over the third gate insulating layer; and

the third source electrode and the third drain electrode which are electrically connected to the oxide semiconductor layer.

22. The semiconductor device according to claim 16, wherein an off-current of the third transistor is 1×

10<sup>−

13</sup> A or less.

23. The semiconductor device according to claim 16, wherein the substrate including a semiconductor material other than an oxide semiconductor is a single crystal semiconductor substrate or an SOI substrate.

24. The semiconductor device according to claim 16, wherein the semiconductor material other than an oxide semiconductor is silicon.

25. The semiconductor device according to claim 16, wherein the oxide semiconductor layer includes an In—

Ga—

Zn—

O-based oxide semiconductor material.

26. The semiconductor device according to claim 16, wherein the oxide semiconductor layer includes an In₂Ga₂ZnO₇ crystal.

27. The semiconductor device according to claim 16, wherein a concentration of hydrogen in the oxide semiconductor layer is 5×

10¹⁹ atoms/cm³ or less.