PAPER INCLUDING SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF

• US 20110101366A1
• Filed: 01/06/2011
• Published: 05/05/2011
• Est. Priority Date: 06/26/2006
• Status: Active Grant

• Current Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Original Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Inventors: KUSUMOTO, Naoto, DOZEN, Yoshitaka, TAKAHASHI, Hidekazu, AOKI, Tomoyuki, YAMADA, Daiki, OGITA, Kaori
• Granted Patent: US 8,278,663 B2
• Time in Patent Office: Days
• US Class Current: 257/66
• CPC Class Codes: B32B 29/00 Layered products comprising a layer of paper or cardboard
• CPC Class Codes: D21H 21/48 Elements suited for physical verification, e.g. by irradiation
• CPC Class Codes: D21H 27/32 with materials applied between the sheets attaching together paper or cardboard sheets B31F5/00; adhesives C09J
• CPC Class Codes: G06K 19/07749 the record carrier being capable of non-contact communication, e.g. constructional details of the antenna of a non-contact smart card
• CPC Class Codes: H01L 23/49855 for flat-cards, e.g. credit cards cards per se G06K19/00
• CPC Class Codes: H01L 27/1214 comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
• CPC Class Codes: H01L 27/1255 integrated with passive devices, e.g. auxiliary capacitors
• CPC Class Codes: H01L 27/1266 the substrate on which the devices are formed not being the final device substrate, e.g. using a temporary substrate
• CPC Class Codes: H01L 29/78603 characterised by the insulating substrate or support H01L29/78657 takes precedence
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/0002 Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Abstract

Paper embedded with a semiconductor device capable of communicating wirelessly is realized, whose unevenness of a portion including the semiconductor device does not stand out and the paper is thin with a thickness of less than or equal to 130 μm. A semiconductor device is provided with a circuit portion and an antenna, and the circuit portion includes a thin film transistor. The circuit portion and the antenna are separated from a substrate used during manufacturing, and are interposed between a flexible base and a sealing layer and protected. The semiconductor device can be bent, and the thickness of the semiconductor device itself is less than or equal to 30 μm. The semiconductor device is embedded in a paper in a papermaking process.

Claims

1. A paper including a semiconductor device, the semiconductor device comprising:

a flexible base; and

a stacked-layer body over the flexible base, the stacked-layer body comprising an element layer having a circuit including a transistor, and a sealing layer for sealing a top surface of the element layer,

wherein a thickness of the semiconductor device is less than or equal to 30 μ

m.

2. The paper including a semiconductor device according to claim 1, wherein the sealing layer is a resin layer.

3. The paper including a semiconductor device according to claim 1, wherein a channel formation region of the transistor is made of a crystalline semiconductor.

4. The paper including a semiconductor device according to claim 1, wherein the transistor is a thin film transistor.

5. The paper including a semiconductor device according to claim 1, wherein the paper is a multilayered paper and the semiconductor device is embedded between a paper layer and a paper layer.

6. A paper including a semiconductor device, the semiconductor device comprising:

a flexible base; and

a stacked-layer body over the flexible base, the stacked-layer body comprising an element layer having a circuit including a transistor, and a sealing layer for sealing a top surface of the element layer,

wherein a side surface of the stacked-layer body is formed of the sealing layer and stacked-layer films of insulating films that are formed when the circuit is manufactured.

7. The paper including a semiconductor device according to claim 6, wherein the sealing layer is a resin layer.

8. The paper including a semiconductor device according to claim 6, wherein a channel formation region of the transistor is made of a crystalline semiconductor.

9. The paper including a semiconductor device according to claim 6, wherein the transistor is a thin film transistor.

10. The paper including a semiconductor device according to claim 6, wherein the paper is a multilayered paper and the semiconductor device is embedded between a paper layer and a paper layer.

11. A paper including a semiconductor device, the semiconductor device comprising:

a flexible base; and

a stacked-layer body over the flexible base, the stacked-layer body comprising an element layer having a circuit including a transistor, and a sealing layer for sealing a top surface of the element layer,

wherein a side surface of the element layer is made of stacked-layer films of insulating films that are formed when the circuit is manufactured, and

wherein a side surface of the stacked-layer body is formed when the element layer is cut together with the sealing layer to separate each semiconductor device from one another.

12. The paper including a semiconductor device according to claim 11, wherein the sealing layer is a resin layer.

13. The paper including a semiconductor device according to claim 11, wherein a channel formation region of the transistor is made of a crystalline semiconductor.

14. The paper including a semiconductor device according to claim 11, wherein the transistor is a thin film transistor.

15. The paper including a semiconductor device according to claim 11, wherein the paper is a multilayered paper and the semiconductor device is embedded between a paper layer and a paper layer.

16. A paper including a semiconductor device, the semiconductor device comprising:

a flexible base;

an element layer over the flexible base, having a circuit including a transistor; and

a sealing layer stacked over the element layer and sealing a top surface of the element layer,

wherein a side surface of the element layer is made of stacked-layer films of insulating films formed when manufacturing the circuit, and is aligned with a side surface of the sealing layer.

17. The paper including a semiconductor device according to claim 16, wherein the sealing layer is a resin layer.

18. The paper including a semiconductor device according to claim 16, wherein a channel formation region of the transistor is made of a crystalline semiconductor.

19. The paper including a semiconductor device according to claim 16, wherein the transistor is a thin film transistor.

20. The paper including a semiconductor device according to claim 16, wherein the paper is a multilayered paper and the semiconductor device is embedded between a paper layer and a paper layer.