AUTOMATED SHORT LENGTH WIRE SHAPE STRAPPING AND METHODS OF FABRICTING THE SAME

• US 20110101534A1
• Filed: 11/04/2009
• Published: 05/05/2011
• Est. Priority Date: 11/04/2009
• Status: Abandoned Application

• Current Assignee: International Business Machines Corporation
• Original Assignee: International Business Machines Corporation
• Inventors: STAMPER, Anthony K.
• Application Number:
  US12/612,160
• Publication Number:
  US 20110101534A1
• Time in Patent Office: Days
• US Class Current: 257/773
• CPC Class Codes: H01L 21/76838 characterised by the formation and the after-treatment of the conductors etching for patterning the conductors H01L21/3213
• CPC Class Codes: H01L 21/76895 Local interconnects; Local pads, as exemplified by patent document EP0896365
• CPC Class Codes: H01L 23/522 including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
• CPC Class Codes: H01L 23/528 Geometry or layout of the interconnection structure H01L27/0207 takes precedence; algorithms G06F30/00
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/0002 Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Abstract

An automatic short length wire shape generation and strapping and method of fabricating such wires is provided. The method of manufacturing includes breaking of a wiring into adjacent short length wires which are below a maximum short length effect length. The adjacent short length wires are formed in a same wiring level of an integrated circuit. The method further includes forming a conductive strap in a single deposition process which overlaps and is in contact with the adjacent short length wires.

Claims

1. A method of manufacturing a structure, comprising:

breaking of a single wiring into adjacent short length wires which are below a maximum length, the adjacent short length wires being in a same wiring level of an integrated circuit; and

forming a conductive strap which overlaps and is in contact with the adjacent short length wires.

2. The method of claim 1, wherein the conductive strap is an automatically generated thin wiring which is formed entirely in a single plane.

3. The method of claim 2, wherein the conductive strap is formed in the dielectric material below the adjacent short length wires.

4. The method of claim 3, wherein the conductive strap is deposited above a conductive stud and separated from the conductive stud by dielectric material.

5. The method of claim 2, wherein the conductive strap is deposited over the adjacent short length wires.

6. The method of claim 2, wherein the conductive strap is formed partially though a layer of the dielectric material.

7. The method of claim 2, wherein the conductive strap is formed with a subtractive etching process.

8. The method of claim 2, wherein the adjacent short length wires are formed with a subtractive etching process.

9. The method of claim 1, wherein the overlap provides contact with each side of the conductive strap and the adjacent short length wires.

10. The method of claim 1, wherein the adjacent short length wires are formed in contact with the conductive strap by depositing metal above the conductive strap.

11. The method of claim 1, wherein the conductive strap is automatically generated based on a location of the adjacent short length wires.

12. A method of manufacturing a structure, comprising:

forming adjacent wires in a same wiring level of an integrated circuit separated by an insulator material, the adjacent wires are below a maximum short length effect; and

forming a conductive strap entirely within a single plane and which overlaps and is in contact with the adjacent wires.

13. The method of claim 12, wherein the conductive strap is a thin metal film formed in a shallow trench above a conductive stud and separated from the conductive stud by dielectric material.

14. The method of claim 12, wherein the conductive strap is formed in a dielectric material below the adjacent wires, by etching a shallow trench in the dielectric material and depositing a metal in the shallow trench such that the conductive strap extends only partially within the dielectric material.

15. The method of claim 12, wherein the conductive strap is below the adjacent wires.

16. The method of claim 12, wherein the conductive strap is deposited over the adjacent wires in a different wiring level than the adjacent wires.

17. The method of claim 12, wherein the conductive strap is automatically generated based on a location of the adjacent wires.

18. A structure, comprising:

adjacent wires in a same wiring level of an integrated circuit separated by an insulator material, a combination of which are below a maximum short length effect length; and

a conductive strap entirely within a single plane and which is in contact with the adjacent wires, wherein the conductive strap will extend only partially within a dielectric layer above or below the adjacent wires, wherein the conductive strap overlaps with the adjacent wires.

19. The structure of claim 18, wherein the conductive strap is above the adjacent wires.

20. The structure of claim 18, wherein the conductive strap is below the adjacent wires.