Method of making a semiconductor chip assembly with a post/base heat spreader with an ESD protection layer

• US 20110104855A1
• Filed: 12/24/2010
• Published: 05/05/2011
• Est. Priority Date: 03/25/2008
• Status: Active Grant

• Current Assignee: Bridge Semiconductor Corporation
• Original Assignee: Bridge Semiconductor Corporation
• Inventors: Lin, Charles W.C., Wang, Chia-Chung
• Granted Patent: US 8,329,510 B2
• Time in Patent Office: Days
• US Class Current: 438/118
• CPC Class Codes: H01L 2224/29111 Tin [Sn] as principal constituent
• CPC Class Codes: H01L 2224/2919 with a principal constituent of the material being a polymer, e.g. polyester, phenolic based polymer, epoxy
• CPC Class Codes: H01L 2224/2929 with a principal constituent of the material being a polymer, e.g. polyester, phenolic based polymer, epoxy
• CPC Class Codes: H01L 2224/29339 Silver [Ag] as principal constituent
• CPC Class Codes: H01L 2224/32013 the layer connector being larger than the bonding area, e.g. bond pad
• CPC Class Codes: H01L 2224/32188 the layer connector connecting to a bonding area protruding from the surface of the item
• CPC Class Codes: H01L 2224/32245 the item being metallic
• CPC Class Codes: H01L 2224/45144 Gold (Au) as principal constituent
• CPC Class Codes: H01L 2224/48091 Arched
• CPC Class Codes: H01L 2224/49175 Parallel arrangements
• CPC Class Codes: H01L 2224/73265 Layer and wire connectors
• CPC Class Codes: H01L 2224/83851 being an anisotropic conductive adhesive
• CPC Class Codes: H01L 2224/83855 Hardening the adhesive by curing, i.e. thermosetting
• CPC Class Codes: H01L 2224/85205 Ultrasonic bonding
• CPC Class Codes: H01L 2224/85207 Thermosonic bonding
• CPC Class Codes: H01L 23/142 Metallic substrates having insulating layers
• CPC Class Codes: H01L 23/3677 Wire-like or pin-like cooling fins or heat sinks
• CPC Class Codes: H01L 23/49827 Via connections through the substrates, e.g. pins going through the substrate, coaxial cables H01L23/49822, H01L23/49833, H01L23/4985, H01L23/49861 take precedence
• CPC Class Codes: H01L 23/49894 Materials of the insulating layers or coatings
• CPC Class Codes: H01L 23/60 Protection against electrostatic charges or discharges, e.g. Faraday shields
• CPC Class Codes: H01L 24/28 : Structure, shape, material or disposition of the layer connectors prior to the connecting process
• CPC Class Codes: H01L 24/29 : of an individual layer connector
• CPC Class Codes: H01L 24/45 : of an individual wire connector
• CPC Class Codes: H01L 24/48 : of an individual wire connector
• CPC Class Codes: H01L 24/49 : of a plurality of wire connectors
• CPC Class Codes: H01L 24/83 : using a layer connector
• CPC Class Codes: H01L 24/85 : using a wire connector wire bonding in general B23K20/004
• CPC Class Codes: H01L 2924/00 : Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/00012 : Relevant to the scope of the group, the symbol of which is combined with the symbol of this group
• CPC Class Codes: H01L 2924/00014 : the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
• CPC Class Codes: H01L 2924/01007 : Nitrogen [N]
• CPC Class Codes: H01L 2924/01012 : Magnesium [Mg]
• CPC Class Codes: H01L 2924/01013 : Aluminum [Al]
• CPC Class Codes: H01L 2924/01014 : Silicon [Si]
• CPC Class Codes: H01L 2924/01015 : Phosphorus [P]
• CPC Class Codes: H01L 2924/01019 : Potassium [K]
• CPC Class Codes: H01L 2924/01026 : Iron [Fe]
• CPC Class Codes: H01L 2924/01028 : Nickel [Ni]
• CPC Class Codes: H01L 2924/01029 : Copper [Cu]
• CPC Class Codes: H01L 2924/01031 : Gallium [Ga]
• CPC Class Codes: H01L 2924/01033 : Arsenic [As]
• CPC Class Codes: H01L 2924/0104 : Zirconium [Zr]
• CPC Class Codes: H01L 2924/01046 : Palladium [Pd]
• CPC Class Codes: H01L 2924/01047 : Silver [Ag]
• CPC Class Codes: H01L 2924/0105 : Tin [Sn]
• CPC Class Codes: H01L 2924/01058 : Cerium [Ce]
• CPC Class Codes: H01L 2924/01077 : Iridium [Ir]
• CPC Class Codes: H01L 2924/01078 : Platinum [Pt]
• CPC Class Codes: H01L 2924/01079 : Gold [Au]
• CPC Class Codes: H01L 2924/01087 : Francium [Fr]
• CPC Class Codes: H01L 2924/0132 : Binary Alloys
• CPC Class Codes: H01L 2924/01322 : Eutectic Alloys, i.e. obtained by a liquid transforming into two solid phases
• CPC Class Codes: H01L 2924/0134 : Quaternary Alloys
• CPC Class Codes: H01L 2924/014 : Solder alloys
• CPC Class Codes: H01L 2924/0665 : Epoxy resin
• CPC Class Codes: H01L 2924/16195 : Flat cap [not enclosing an internal cavity]
• CPC Class Codes: H01L 2924/181 : Encapsulation
• CPC Class Codes: H01L 2924/19041 : being a capacitor
• CPC Class Codes: H01L 2924/351 : Thermal stress
• CPC Class Codes: H01L 33/486 : adapted for surface mounting
• CPC Class Codes: H01L 33/62 : Arrangements for conducting electric current to or from the semiconductor body, e.g. lead-frames, wire-bonds or solder balls
• CPC Class Codes: H01L 33/642 : characterized by the shape

Abstract

A method of making a semiconductor chip assembly includes providing a post, a base, an ESD protection layer and a metal layer, wherein the post extends above the base and the ESD protection layer is sandwiched between the base and the metal layer, mounting an adhesive on the base including inserting the post into an opening in the adhesive, mounting a conductive layer on the adhesive including aligning the post with an aperture in the conductive layer, then flowing the adhesive upward between the post and the conductive layer, solidifying the adhesive, then providing a conductive trace that includes a pad, a terminal and a selected portion of the conductive layer, providing a heat spreader that includes the post, the base, the ESD protection layer and an underlayer that includes at least a portion of the metal layer, then mounting a semiconductor device on the post, electrically connecting the semiconductor device to the conductive trace and thermally connecting the semiconductor device to the heat spreader.

Claims

1-55. -55. (canceled)

56. A method of making a semiconductor chip assembly, comprising:

providing a post, a base, an ESD protection layer, a metal layer, an adhesive and a conductive layer, wherein

the post is adjacent to the base, extends above the base in an upward direction, extends into an opening in the adhesive and is aligned with an aperture in the conductive layer,

the base extends below the post in a downward direction opposite the upward direction and extends laterally from the post in lateral directions orthogonal to the upward and downward directions,

the ESD protection layer is a thermally conductive, electrically insulative material that contacts and is sandwiched between the base and the metal layer, extends below the base and extends laterally beyond the post,

the metal layer extends below the ESD protection layer and extends laterally beyond the post,

the adhesive is mounted on and extends above the base, is sandwiched between the base and the conductive layer and is non-solidified, and

the conductive layer is mounted on and extends above the adhesive;

then

flowing the adhesive into and upward in a gap located in the aperture between the post and the conductive layer;

solidifying the adhesive;

then

providing a conductive trace that includes a pad, a terminal and a selected portion of the conductive layer;

providing a heat spreader that includes the post, the base, the ESD protection layer and an underlayer that includes at least a portion of the metal layer;

then

mounting a semiconductor device on the post, wherein the semiconductor device overlaps the post, the base, the ESD protection layer and the underlayer and is electrically isolated from the underlayer;

electrically connecting the semiconductor device to the pad, thereby electrically connecting the semiconductor device to the terminal; and

thermally connecting the semiconductor device to the post, thereby thermally connecting the semiconductor device to the underlayer.

57. The method of claim 56, wherein providing the post and the base includes:

providing a metal plate;

forming an etch mask on the metal plate that selectively exposes the metal plate and defines the post;

etching the metal plate in a pattern defined by the etch mask, thereby forming a recess in the metal plate that extends into but not through the metal plate, wherein the post includes an unetched portion of the metal plate that protrudes above the base and is laterally surrounded by the recess and the base includes an unetched portion of the metal plate below the post and the recess; and

then

removing the etch mask.

58. The method of claim 56, wherein providing the post, the base, the ESD protection layer and the metal layer includes:

providing a metal plate;

attaching the ESD protection layer and the metal layer to the metal plate;

then

forming an etch mask on the metal plate that selectively exposes the metal plate and defines the post;

etching the metal plate in a pattern defined by the etch mask, thereby forming a recess in the metal plate that extends into but not through the metal plate, wherein the post includes an unetched portion of the metal plate that protrudes above the base and is laterally surrounded by the recess and the base includes an unetched portion of the metal plate below the post and the recess; and

then

removing the etch mask.

59. The method of claim 56, wherein:

providing the adhesive includes providing a prepreg with uncured epoxy;

flowing the adhesive includes melting the uncured epoxy and compressing the uncured epoxy between the base and the conductive layer; and

solidifying the adhesive includes curing the uncured epoxy.

60. The method of claim 56, wherein flowing the adhesive includes filling the gap with the adhesive.

61. The method of claim 56, wherein mounting the conductive layer includes mounting the conductive layer alone on the adhesive.

62. The method of claim 56, wherein mounting the conductive layer includes mounting the conductive layer and a dielectric layer on the adhesive.

63. The method of claim 56, wherein providing the pad includes removing selected portions of the conductive layer after solidifying the adhesive.

64. The method of claim 56, wherein providing the pad includes:

grinding the post, the adhesive and the conductive layer such that the post, the adhesive and the conductive layer are laterally aligned with one another at a top lateral surface that faces in the upward direction; and

then

removing selected portions of the conductive layer using an etch mask that defines the pad.

65. The method of claim 56, wherein providing the terminal includes removing selected portions of the metal layer after solidifying the adhesive.

66. The method of claim 56, wherein providing the conductive trace includes providing a plated through-hole after solidifying the adhesive.

67. The method of claim 56, wherein providing the underlayer includes removing selected portions of the metal layer after solidifying the adhesive.

68. The method of claim 56, wherein providing the conductive trace and the heat spreader includes:

removing selected portions of the conductive layer using an etch mask that defines the pad after solidifying the adhesive; and

removing selected portions of the metal layer using an etch mask that defines the terminal and the underlayer after solidifying the adhesive.

69. The method of claim 56, wherein mounting the semiconductor device includes providing a first solder joint between the semiconductor device and the pad and a second solder joint between the semiconductor device and the post, electrically connecting the semiconductor device includes providing the first solder joint between the semiconductor device and the pad, and thermally connecting the semiconductor device includes providing the second solder joint between the semiconductor device and the post.

70. The method of claim 56, wherein mounting the semiconductor device includes providing a die attach between the semiconductor device and the post, electrically connecting the semiconductor device includes providing a wire bond between the semiconductor device and the pad, and thermally connecting the semiconductor device includes providing the die attach between the semiconductor device and the post.

71. A method of making a semiconductor chip assembly, comprising:

providing a post, a base, an ESD protection layer and a metal layer, wherein the post is adjacent to and integral with the base and extends above the base in an upward direction, the base extends below the post in a downward direction opposite the upward direction and extends laterally from the post in lateral directions orthogonal to the upward and downward directions, the ESD protection layer is a thermally conductive, electrically insulative material that contacts and is sandwiched between the base and the metal layer, extends below the base and extends laterally beyond the post and the metal layer extends below the ESD protection layer and extends laterally beyond the post;

providing an adhesive, wherein an opening extends through the adhesive;

providing a conductive layer, wherein an aperture extends through the conductive layer;

mounting the adhesive on the base, including inserting the post into the opening, wherein the adhesive extends above the base and the post extends into the opening;

mounting the conductive layer on the adhesive, including aligning the post with the aperture, wherein the conductive layer extends above the adhesive and the adhesive is sandwiched between the base and the conductive layer and is non-solidified;

then

applying heat to melt the adhesive;

moving the base and the conductive layer towards one another, thereby moving the post upward in the aperture and applying pressure to the molten adhesive between the base and the conductive layer, wherein the pressure forces the molten adhesive to flow into and upward in a gap located in the aperture between the post and the conductive layer;

applying heat to solidify the molten adhesive, thereby mechanically attaching the post and the base to the conductive layer;

then

providing a conductive trace that includes a pad, a terminal and a selected portion of the conductive layer;

providing a heat spreader that includes the post, the base, the ESD protection layer and an underlayer that includes at least a portion of the metal layer;

then

mounting a semiconductor device on the post, wherein the semiconductor device overlaps the post, the base, the ESD protection layer and the underlayer and is electrically isolated from the underlayer;

electrically connecting the semiconductor device to the pad, thereby electrically connecting the semiconductor device to the terminal; and

thermally connecting the semiconductor device to the post, thereby thermally connecting the semiconductor device to the underlayer.

72. The method of claim 71, wherein providing the post and the base includes:

providing a metal plate;

forming an etch mask on the metal plate that selectively exposes the metal plate and defines the post;

etching the metal plate in a pattern defined by the etch mask, thereby forming a recess in the metal plate that extends into but not through the metal plate, wherein the post includes an unetched portion of the metal plate that protrudes above the base and is laterally surrounded by the recess and the base includes an unetched portion of the metal plate below the post and the recess; and

then

removing the etch mask.

73. The method of claim 71, wherein providing the post, the base, the ESD protection layer and the metal layer includes:

providing a metal plate;

attaching the ESD protection layer and the metal layer to the metal plate;

then

forming an etch mask on the metal plate that selectively exposes the metal plate and defines the post;

etching the metal plate in a pattern defined by the etch mask, thereby forming a recess in the metal plate that extends into but not through the metal plate, wherein the post includes an unetched portion of the metal plate that protrudes above the base and is laterally surrounded by the recess and the base includes an unetched portion of the metal plate below the post and the recess; and

then

removing the etch mask.

74. The method of claim 71, wherein:

providing the adhesive includes providing a prepreg with uncured epoxy;

flowing the adhesive includes melting the uncured epoxy and compressing the uncured epoxy between the base and the conductive layer; and

solidifying the adhesive includes curing the uncured epoxy.

75. The method of claim 71, wherein flowing the adhesive includes filling the gap with the adhesive.

76. The method of claim 71, wherein mounting the conductive layer includes mounting the conductive layer alone on the adhesive.

77. The method of claim 71, wherein mounting the conductive layer includes mounting the conductive layer and a dielectric layer on the adhesive.

78. The method of claim 71, wherein providing the pad includes removing selected portions of the conductive layer after solidifying the adhesive.

79. The method of claim 71, wherein providing the pad includes:

grinding the post, the adhesive and the conductive layer such that the post, the adhesive and the conductive layer are laterally aligned with one another at a top lateral surface that faces in the upward direction; and

then

removing selected portions of the conductive layer using an etch mask that defines the pad.

80. The method of claim 71, wherein providing the terminal includes removing selected portions of the metal layer after solidifying the adhesive.

81. The method of claim 71, wherein providing the conductive trace includes providing a plated through-hole after solidifying the adhesive.

82. The method of claim 71, wherein providing the underlayer includes removing selected portions of the metal layer after solidifying the adhesive.

83. The method of claim 71, wherein providing the conductive trace and the heat spreader includes:

removing selected portions of the conductive layer using an etch mask that defines the pad after solidifying the adhesive; and

removing selected portions of the metal layer using an etch mask that defines the terminal and the underlayer after solidifying the adhesive.

84. The method of claim 71, wherein mounting the semiconductor device includes providing a first solder joint between the semiconductor device and the pad and a second solder joint between the semiconductor device and the post, electrically connecting the semiconductor device includes providing the first solder joint between the semiconductor device and the pad, and thermally connecting the semiconductor device includes providing the second solder joint between the semiconductor device and the post.

85. The method of claim 71, wherein mounting the semiconductor device includes providing a die attach between the semiconductor device and the post, electrically connecting the semiconductor device includes providing a wire bond between the semiconductor device and the pad, and thermally connecting the semiconductor device includes providing the die attach between the semiconductor device and the post.

86. A method of making a semiconductor chip assembly, comprising:

providing a post, a base, an ESD protection layer, a metal layer, an adhesive and a substrate, wherein

the post is adjacent to the base, extends above the base in an upward direction, extends into an opening in the adhesive and is aligned with an aperture in the substrate,

the base extends below the post in a downward direction opposite the upward direction and extends laterally from the post in lateral directions orthogonal to the upward and downward directions,

the ESD protection layer is a thermally conductive, electrically insulative material that contacts and is sandwiched between the base and the metal layer, extends below the base and extends laterally beyond the post,

the metal layer extends below the ESD protection layer and extends laterally beyond the post,

the adhesive is mounted on and extends above the base, is sandwiched between the base and the substrate and is non-solidified, and

the substrate is mounted on and extends above the adhesive, wherein the substrate includes a conductive layer and a dielectric layer and the conductive layer extends above the dielectric layer;

then

flowing the adhesive into and upward in a gap located in the aperture between the post and the substrate;

solidifying the adhesive;

then

providing a plated through-hole that extends through the base, the adhesive, the dielectric layer and the ESD protection layer and is spaced from the base;

then

providing a conductive trace that includes a pad, a terminal and the plated through-hole, wherein the pad includes a selected portion of the conductive layer, the terminal includes a selected portion of the metal layer and an electrically conductive path between the pad and the terminal includes the plated through-hole;

providing a heat spreader that includes the post, the base, the ESD protection layer and an underlayer that includes a selected portion of the metal layer;

then

mounting a semiconductor device on the post, wherein the semiconductor device overlaps the post, the base, the ESD protection layer and the underlayer and is electrically isolated from the underlayer;

electrically connecting the semiconductor device to the pad, thereby electrically connecting the semiconductor device to the terminal; and

thermally connecting the semiconductor device to the post, thereby thermally connecting the semiconductor device to the underlayer.

87. The method of claim 86, wherein providing the post, the base, the ESD protection layer and the metal layer includes:

providing a metal plate;

attaching the ESD protection layer and the metal layer to the metal plate;

then

forming an etch mask on the metal plate that selectively exposes the metal plate and defines the post;

etching the metal plate in a pattern defined by the etch mask, thereby forming a recess in the metal plate that extends into but not through the metal plate, wherein the post includes an unetched portion of the metal plate that protrudes above the base and is laterally surrounded by the recess and the base includes an unetched portion of the metal plate below the post and the recess; and

then

removing the etch mask.

88. The method of claim 86, wherein:

providing the adhesive includes providing a prepreg with uncured epoxy;

flowing the adhesive includes melting the uncured epoxy and compressing the uncured epoxy between the base and the substrate; and

solidifying the adhesive includes curing the uncured epoxy.

89. The method of claim 86, wherein flowing the adhesive includes filling the gap with the adhesive.

90. The method of claim 86, wherein providing the pad includes:

grinding the post, the adhesive and the conductive layer such that the post, the adhesive and the conductive layer are laterally aligned with one another at a top lateral surface that faces in the upward direction; and

then

removing selected portions of the conductive layer using an etch mask that defines the pad.

91. The method of claim 86, wherein providing the pad and the plated through-hole includes:

providing a hole that extends through the base, the adhesive, the dielectric layer, the conductive layer, the metal layer and the ESD protection layer after solidifying the adhesive;

then

depositing a plated layer on the conductive layer and into the hole, wherein the plated layer forms an upper plated layer that covers the post in the upward direction and the plated through-hole in the hole;

then

forming an etch mask on the upper plated layer that defines the pad;

etching the conductive layer and the upper plated layer in a pattern defined by the etch mask; and

then

removing the etch mask.

92. The method of claim 86, wherein providing the terminal and the plated through-hole includes:

providing a hole through that extends through the base, the adhesive, the dielectric layer, the metal layer, the conductive layer and the ESD protection layer after solidifying the adhesive;

then

depositing a plated layer on the metal layer and into the hole, wherein the plated layer forms a lower plated layer that covers the post in the downward direction and the plated through-hole in the hole;

then

forming an etch mask on the lower plated layer that defines the terminal;

etching the metal layer and the lower plated layer in a pattern defined by the etch mask; and

then

removing the etch mask.

93. The method of claim 86, wherein providing the pad, the terminal, the plated through-hole and the underlayer includes:

providing a hole that extends through the base, the adhesive, the dielectric layer, the conductive layer, the metal layer and the ESD protection layer after solidifying the adhesive;

then

depositing a plated layer on the conductive layer and the metal layer, wherein the plated layer forms an upper plated layer that covers the post in the upward direction, a lower plated layer that covers the post in the downward direction and the plated through-hole in the hole;

then

forming a first etch mask on the upper plated layer that defines the pad;

etching the conductive layer and the upper plated layer in a pattern defined by the first etch mask;

forming a second etch mask on the lower plated layer that defines the terminal and the underlayer;

etching the metal layer and the lower plated layer in a pattern defined by the second etch mask; and

removing the etch masks.

94. The method of claim 86, wherein mounting the semiconductor device includes providing a first solder joint between the semiconductor device and the pad and a second solder joint between the semiconductor device and the post, electrically connecting the semiconductor device includes providing the first solder joint between the semiconductor device and the pad, and thermally connecting the semiconductor device includes providing the second solder joint between the semiconductor device and the post.

95. The method of claim 86, wherein mounting the semiconductor device includes providing a die attach between the semiconductor device and the post, electrically connecting the semiconductor device includes providing a wire bond between the semiconductor device and the pad, and thermally connecting the semiconductor device includes providing the die attach between the semiconductor device and the post.

96. A method of making a semiconductor chip assembly, comprising:

providing a post, and a base, an ESD protection layer and a metal layer, wherein the post is adjacent to and integral with the base and extends above the base in an upward direction, and the base extends below the post in a downward direction opposite the upward direction and extends laterally from the post in lateral directions orthogonal to the upward and downward directions, the ESD protection layer is a thermally conductive, electrically insulative material that contacts and is sandwiched between the base and the metal layer, extends below the base and extends laterally beyond the post and the metal layer extends below the ESD protection layer and extends laterally beyond the post;

providing an adhesive, wherein an opening extends through the adhesive;

providing a substrate that includes a conductive layer and a dielectric layer, wherein an aperture extends through the substrate;

mounting the adhesive on the base, including inserting the post through the opening, wherein the adhesive extends above the base and the post extends through the opening;

mounting the substrate on the adhesive, including inserting the post into the aperture, wherein the substrate extends above the adhesive, the conductive layer extends above the dielectric layer, the post extends through the opening into the aperture and the adhesive is sandwiched between the base and the substrate and is non-solidified;

then

applying heat to melt the adhesive;

moving the base and the substrate towards one another, thereby moving the post upward in the aperture and applying pressure to the molten adhesive between the base and the substrate, wherein the pressure forces the molten adhesive to flow into and upward in a gap located in the aperture between the post and the substrate;

applying heat to solidify the molten adhesive, thereby mechanically attaching the post and the base to the substrate;

then

providing a plated through-hole that extends through the base, the adhesive, the dielectric layer and the ESD protection layer and is spaced from the base;

then

providing a conductive trace that includes a pad, a terminal and the plated through-hole, wherein the pad includes a selected portion of the conductive layer, the terminal includes a selected portion of the metal layer and an electrically conductive path between the pad and the terminal includes the plated through-hole;

providing a heat spreader that includes the post, the base, the ESD protection layer, a cap and an underlayer, wherein the cap is above and adjacent to and covers in the upward direction and extends laterally from a top of the post and includes a selected portion of the conductive layer and the underlayer includes a selected portion of the metal layer;

then

mounting a semiconductor device on the cap, wherein the semiconductor device overlaps the post, the base, the cap, the ESD protection layer and the underlayer and is electrically isolated from the underlayer;

electrically connecting the semiconductor device to the pad, thereby electrically connecting the semiconductor device to the terminal; and

thermally connecting the semiconductor device to the cap, thereby thermally connecting the semiconductor device to the underlayer.

97. The method of claim 96, wherein providing the post, the base, the ESD protection layer and the metal layer includes:

providing a metal plate;

attaching the ESD protection layer and the metal layer to the metal plate;

then

forming an etch mask on the metal plate that selectively exposes the metal plate and defines the post;

etching the metal plate in a pattern defined by the etch mask, thereby forming a recess in the metal plate that extends into but not through the metal plate, wherein the post includes an unetched portion of the metal plate that protrudes above the base and is laterally surrounded by the recess and the base includes an unetched portion of the metal plate below the post and the recess; and

then

removing the etch mask.

98. The method of claim 96, wherein:

providing the adhesive includes providing a prepreg with uncured epoxy;

flowing the adhesive includes melting the uncured epoxy and compressing the uncured epoxy between the base and the substrate; and

solidifying the adhesive includes curing the uncured epoxy.

99. The method of claim 96, wherein providing the pad, the terminal, the plated through-hole, the cap and the underlayer includes:

providing a hole that extends through the base, the adhesive, the dielectric layer, the conductive layer, the metal layer and the ESD protection after solidifying the adhesive;

then

depositing a plated layer on the post, the conductive layer and the metal layer, wherein the plated layer forms an upper plated layer that covers the post in the upward direction, a lower plated layer that covers the post in the downward direction and the plated through-hole in the hole;

then

forming a first etch mask on the upper plated layer that defines the pad and the cap;

etching the conductive layer and the upper plated layer in a pattern defined by the first etch mask;

forming a second etch mask on the lower plated layer that defines the terminal and the underlayer;

etching the metal layer and the lower plated layer in a pattern defined by the second etch mask; and

removing the etch masks.

100. The method of claim 96, wherein mounting the semiconductor device includes providing a die attach between the semiconductor device and the cap, electrically connecting the semiconductor device includes providing a wire bond between the semiconductor device and the pad, and thermally connecting the semiconductor device includes providing the die attach between the semiconductor device and the cap.