Direct conversion receiver architecture

• US 20110105070A1
• Filed: 03/14/2006
• Published: 05/05/2011
• Est. Priority Date: 02/16/2001
• Status: Active Grant

• Current Assignee: Qualcomm, Inc.
• Original Assignee: Qualcomm, Inc.
• Inventors: Peterzell, Paul E., Severson, Matthew L., Holenstein, Christian, Walker, Brett C., Challa, Raghu, Kang, Inyup, Li, Tao, Raghupathy, Arun, Sih, Gilbert Christopher
• Granted Patent: US 8,626,099 B2
• Time in Patent Office: Days
• US Class Current: 455/226.2
• CPC Class Codes: H03G 3/3068 Circuits generating control signals for both R.F. and I.F. stages
• CPC Class Codes: H03G 3/3078 Circuits generating control signals for digitally modulated signals
• CPC Class Codes: H03G 3/3089 Control of digital or coded signals

Abstract

A direct downconversion receiver architecture having a DC loop to remove DC offset from the signal components, a digital variable gain amplifier (DVGA) to provide a range of gains, an automatic gain control (AGC) loop to provide gain control for the DVGA and RF/analog circuitry, and a serial bus interface (SBI) unit to provide controls for the RF/analog circuitry via a serial bus. The DVGA may be advantageously designed and located as described herein. The operating mode of the VGA loop may be selected based on the operating mode of the DC loop, since these two loops interact with one another. The duration of time the DC loop is operated in an acquisition mode may be selected to be inversely proportional to the DC loop bandwidth in the acquisition mode. The controls for some or all of the RF/analog circuitry may be provided via the serial bus.

Claims

1. An automatic gain control (AGC) apparatus operable during direct conversion of RF signals comprising:

an analog variable gain amplifier;

a digital variable gain amplifier coupled to an output of the analog variable gain amplifier;

a gain controller adapted to measure a signal strength and to control the gains of the analog and digital variable gain amplifiers; and

a DC offset canceller interposed between the output of the analog variable gain amplifier and an input of the digital variable gain amplifier.

2. The automatic gain control (AGC) apparatus operable during direct conversion of RF signals according to claim 1,

wherein an AGC loop gain is varied according to an operating mode of the DC offset canceller.

13. The automatic gain control (AGC) apparatus operable during direct conversion of RF signals according to claim 2, comprising:

a first integrated circuit comprising;

said digital variable gain amplifier;

said gain controller adapted to measure said signal strength and to generate a first gain control signal to control the gain of the digital variable gain amplifier and a second gain control signal, the first and second gain control signals controlling components of an AGC loop gain; and

a second integrated circuit comprising;

said analog variable gain amplifier, receiving the second gain control signal and varying gain in accordance therewith, the output of the analog variable gain amplifier coupled to the input of the digital variable gain amplifier.

14. The first integrated circuit, operable with a second integrated circuit to form the automatic gain control (AGC) apparatus operable during direct conversion of RF signals according to claim 2, the second integrated circuit comprising the analog variable gain amplifier, receiving a first gain control signal and varying gain in accordance therewith, and a DC offset canceller interposed between the output of the analog variable gain amplifier and an input of the digital variable gain amplifier, the first integrated circuit comprising:

the gain controller adapted to measure a signal strength and to generate a second gain control signal to control the gain of the digital variable gain amplifier and the first gain control signal, the first and second gain control signals controlling components of an AGC loop gain.

15. The first integrated circuit, operable with a second integrated circuit to form the automatic gain control (AGC) apparatus operable during direct conversion of RF signals according to claim 2, the second integrated circuit comprising the digital variable gain amplifier, the gain controller adapted to measure a signal strength and to generate a first gain control signal to control the gain of the digital variable gain amplifier and a second gain control signal, the first and second gain control signals controlling components of an AGC loop gain, the first integrated circuit comprising:

the analog variable gain amplifier, receiving the second gain control signal and varying gain in accordance therewith, the output of the analog variable gain amplifier operable for coupling to the input of the digital variable gain amplifier.

23. The automatic gain control (AGC) apparatus operable during direct conversion of RF signals according to claim 1, wherein the gain between the output of the analog variable gain amplifier and the input of the digital variable gain amplifier is essentially constant.

3. A method of operating an automatic gain control (AGC) loop in combination with a DC loop comprising:

selecting a particular DC operating mode for the DC loop from among a plurality of possible DC operating modes;

operating the DC loop in the selected DC operating mode to correct for DC offset in a signal;

selecting a particular AGC operating mode for the AGC loop from among a plurality of possible AGC operating modes based on the selected DC operating mode; and

operating the AGC loop in the selected AGC operating mode to provide variable gain for the signal.

4. The method of claim 3, wherein the plurality of possible DC operating modes include an acquisition mode and a tracking mode.

5. The method of claim 4, wherein the acquisition mode has a wider loop bandwidth than that of the tracking mode and is used to more quickly remove a large DC offset in the signal.

6. The method of claim 3, wherein each of the plurality of possible AGC operating modes is associated with a respective AGC loop gain.

7. The method of claim 3, wherein the plurality of possible AGC operating modes includes a normal mode and a low gain mode.

8. The method of claim 7, wherein the plurality of possible AGC operating modes further include a freeze mode.

9. The method of claim 4, wherein the selected AGC operating mode is a low gain mode when the selected DC operating mode is the acquisition mode.

10. The method of claim 4, wherein the selected AGC operating mode is a freeze mode when the selected DC operating mode is the acquisition mode.

11. A direct conversion receiver unit in a wireless communication system, comprising:

a DC loop configurable to operate in one of a plurality of possible DC operating modes to correct for DC offset in a signal; and

an automatic gain control (AGC) loop configurable to operate in one of a plurality of possible AGC operating modes to provide variable gain for the signal, wherein the particular AGC operating mode to be used is determined based on the particular DC operating mode selected for use for the DC loop.

12. The direct conversion receiver unit in a wireless communication system according to claim 11, comprising:

a control apparatus adapted for use in the direct conversion receiver, comprising;

means for selecting the particular DC operating mode for the DC loop from among the plurality of possible DC operating modes;

means for operating the DC loop in the selected DC operating mode to correct for DC offset in a signal;

means for selecting the particular AGC operating mode for the automatic gain control (AGC) loop from among the plurality of possible AGC operating modes based on the selected DC operating mode; and

means for operating the AGC loop in the selected AGC operating mode to provide variable gain for the signal.

25. The direct conversion receiver unit according to claim 12, wherein said means for selecting a particular DC operating mode is a DC offset canceller.

16. An apparatus, comprising:

means for selecting a particular operating mode for a DC loop in a receiver unit from among a plurality of possible operating modes that include an acquisition mode; and

means for, if the selected operating mode is the acquisition mode,

operating the DC loop in the acquisition mode for a particular time duration to correct for DC offset in a desired signal, wherein the particular time duration is inversely proportional to a loop bandwidth for the DC loop for the acquisition mode, and

transitioning out of the acquisition mode after the particular time duration.

17. The apparatus according to claim 16, further comprising:

means for selecting the acquisition mode in response to an event expected to result in a large DC offset in the desired signal, where the event corresponds to application of a new DC offset value to correct for static DC offset in the desired signal.

18. The apparatus according to claim 16,

wherein said means for selecting the particular operating mode for the DC loop in the receiver unit from among the plurality of possible operating modes includes at least the acquisition mode and a tracking mode;

and

the transition being made from the acquisition mode to the tracking mode after the particular time duration.

24. The apparatus according to claim 16, and

means for selecting the acquisition mode in response to an event expected to result in a large DC offset in the desired signal, where the event corresponds to a switch to new analog circuit stages to process the desired signal

19. A method, operable with a DC loop in a receiver unit, the DC loop comprising a first integrated circuit, the first integrated circuit comprising an analog variable gain amplifier and a DC offset canceller, and a second integrated circuit, the second integrated circuit comprising a digital variable gain amplifier, and a gain controller adapted to measure a signal strength and to control the gains of the analog and variable digital variable gain amplifiers, the method comprising:

selecting a particular operating mode for the first integrated circuit from among a plurality of possible operating modes that include an acquisition mode; and

if the selected operating mode is the acquisition mode,

operating the first integrated circuit in the acquisition mode for a particular time duration to correct for DC offset in a desired signal, wherein the particular time duration is inversely proportional to a loop bandwidth for the DC loop for the acquisition mode, and

transitioning out of the acquisition mode after the particular time duration.

20. The method according to claim 19,

the acquisition mode being selected in response to an event expected to result in a large DC offset in the desired signal, where the event corresponds to application of a new DC offset value to correct for static DC offset in the desired signal.

21. The method according to claim 19,

wherein said plurality of operating modes also include a tracking mode;

and

the transition being made from the acquisition mode to the tracking mode after the particular time duration.

22. The method according to claim 19, the acquisition mode being selected in response to an event expected to result in a large DC offset in the desired signal, where the event corresponds to a switch to new analog circuit stages to process the desired signal.