SOLID STATE STORAGE SYSTEMS AND METHODS FOR FLEXIBLY CONTROLLING WEAR LEVELING

• US 20110107016A1
• Filed: 12/29/2009
• Published: 05/05/2011
• Est. Priority Date: 10/29/2009
• Status: Active Grant

• Current Assignee: Hynix Semiconductor Incorporated (SK Hynix Inc.)
• Original Assignee: Hynix Semiconductor Incorporated (SK Hynix Inc.)
• Inventors: Kim, Young Ho, Kim, Eui Jin, Kim, Kyeong Rho, Kwak, Jeong Soon
• Granted Patent: US 8,335,887 B2
• Time in Patent Office: Days
• US Class Current: 711/103
• CPC Class Codes: G06F 12/0246 in block erasable memory, e.g. flash memory
• CPC Class Codes: G06F 2212/7211 Wear leveling

Abstract

Solid-state storage systems and methods are provided for controlling a wear leveling process for uniform use of the memory cells that replaces worn memory blocks with less frequently used memory blocks. The wear leveling process is performed by changing the physical locations of the storage cells within each memory zone or plane. Reference values of target memory block erase counts and worn memory block erase counts are used for searching target memory blocks to be used as replacements.

Claims

1. A solid-state storage system comprising:

a buffer unit configured to sequentially load a plurality of mapping pages where mapping information and erase counts are stored; and

a memory controller configured to set an erase count reference value of a target block and a number of the mapping pages which are searching objects of the target block, in order to search the target block that is to replace the worn block, sample the mapping pages, and execute a wear leveling process thereon.

2. The solid state storage system according to claim 1, wherein the memory controller determines whether to execute a wear leveling process whenever data is erased.

3. The solid-state storage system according to claim 2, wherein the memory controller varies the erase count of the target block whenever a wear leveling process is executed.

4. The solid-state storage system according to claim 3, wherein when searching of the target block fails, the memory controller increases the erase count of the target block when a next wear leveling process is executed.

5. The solid-state storage system according to claim 2, wherein the memory controller separately controls the number of the mapping pages while varying an access count of a flash memory area whenever a wear leveling process is executed.

6. The solid-state storage system according to claim 5, wherein when the erase count of the worn block is larger than a previously set value, the memory controller increases the access count of the flash memory area.

7. The solid-state storage system according to claim 6, wherein as the access count of the flash memory area increases, the memory controller increases the number of mapping pages loaded into the buffer unit.

8. The solid-state storage system according to claim 7, wherein the mapping pages are loaded into the buffer unit sequentially.

9. The solid-state storage system according to claim 1, further comprising a flash memory area including a plurality of memory blocks, wherein the plurality of memory blocks includes a plurality of mapping pages.

10. A solid-state storage system comprising:

a flash memory area comprising a plurality of memory blocks configured to store a mapping page in which mapping information and erase counts are stored; and

a memory controller configured to set a reference value for a number of searching targets with respect to a replacement block, which is to replace a worn block among the memory blocks during a wear leveling process, by using an erase count reference value of the replacement block and information on the worn block, searching an initial replacement block that is to be used as the target block, and replacing the worn block with the searched replacement block.

11. The solid-state storage system according to claim 10, wherein the memory controller varies the erase count reference value of the target block in order to improve a searching success rate of the target block.

12. The solid-state storage system according to claim 11, wherein when the searching of the target block fails during the execution of the wear leveling process, the memory controller increases the erase count of the target block when a next wear leveling process is executed.

13. The solid-state storage system according to claim 10, wherein the memory controller varies the number of the searching targets according to a replacement urgency of the worn block.

14. The solid-state storage system according to claim 13, wherein when the erase count of the worn block is larger than a previously set value, the memory controller increases the access count of the memory area by increasing the number of the target blocks to be searched.

15. A method for controlling a solid-state storage system, comprising the steps of:

setting a first reference value of determining an erase count of a target block that is to replace a worn block during a wear leveling process;

setting a second reference value of searching the target block according to the erase count of the worn block;

searching the target block under the first and second reference values; and

varying and updating the first reference value when the target block is not searched, and influencing a searching condition for a next target block.

16. The method according to claim 15, wherein the step of setting the first reference value comprises the step of setting an erase count having a predetermined value so as to be selected as the target block.

17. The method according to claim 15, wherein, in the step of setting the second reference value, as the erase count of the worn block increases, an access count of a memory area is set by increasing the number of blocks to be searched as the target block.

18. The method according to claim 17, wherein the searching of the target block having the erase count of the first reference value or less is repeated during the access count, which is the second reference value.

19. The method according to claim 15, further comprising the step of setting an accumulated fail count informing searching success or failure of the target block upon the entry into the wear leveling process,

wherein the step of setting the first reference value sets the erase count of the target block by using the accumulated fail count.

20. The method according to claim 19, wherein when the target block is not searched, the erase count reference value of the target block is increased by increasing the accumulated fail count.

21. The method according to claim 19, wherein when the target block is searched, the erase count reference value of the target block is decreased by decreasing the accumulated fail count.