METHOD AND APPARATUS ADAPTED TO PREVENT CODE DATA FROM BEING LOST IN SOLDER REFLOW

• US 20110107049A1
• Filed: 07/30/2010
• Published: 05/05/2011
• Est. Priority Date: 11/02/2009
• Status: Active Grant

• Current Assignee: Samsung Electronics Co. Ltd.
• Original Assignee: Samsung Electronics Co. Ltd.
• Inventors: Kwon, Jin Hyoung, Seo, Hui Kwon
• Granted Patent: US 8,788,741 B2
• Time in Patent Office: Days
• US Class Current: 711/165
• CPC Class Codes: G06F 11/004 Error avoidance G06F11/07 and subgroups take precedence
• CPC Class Codes: G11C 11/5628 Programming or writing circuits; Data input circuits

Abstract

A semiconductor device comprises a first non-volatile memory configured to store program code and a processor configured to copy the program code from the first non-volatile memory to a second non-volatile memory after a solder reflow process. The processor typically copies the program code from the first non-volatile memory to the second non-volatile memory after the processor is completely booted.

Claims

1. A method of managing program code in a semiconductor device comprising a first non-volatile memory and a second non-volatile memory, the method comprising:

writing the program code to the first non-volatile memory before a solder reflow process is performed; and

copying the program code from the first non-volatile memory to a second non-volatile memory after the solder reflow process is performed.

2. The method of claim 1, wherein the second non-volatile memory is a phase-change memory.

3. The method of claim 1, further comprising deleting the program code from the first non-volatile memory after completely copying the program code to the second non-volatile memory.

4. The method of claim 1, further comprising:

operating a central processing unit (CPU) to store the program code in a shared memory bank of a multi-port memory device; and

operating a processor to copy the program code from the shared memory bank to a second memory bank of the multi-port memory device, and then to write the program code from the shared memory bank to the first non-volatile memory.

5. A semiconductor device comprising:

a first non-volatile memory configured to store program code; and

a processor configured to copy the program code from the first non-volatile memory to a second non-volatile memory after a solder reflow process is performed.

6. The semiconductor device of claim 5, wherein the processor is configured to copy the program code from the first non-volatile memory to the second non-volatile memory after the processor is completely booted.

7. The semiconductor device of claim 5, wherein the processor is configured to delete the program code from the first non-volatile memory after the program code is completely copied to the second non-volatile memory.

8. The semiconductor device of claim 5, wherein the second non-volatile memory is a phase-change memory.

9. The semiconductor device of claim 5, wherein the semiconductor device is a multi-chip package (MCP) semiconductor device.

10. The semiconductor device of claim 5, wherein the solder reflow process comprises infrared (IR) reflow.

11. The semiconductor device of claim 5, further comprising a multiport memory device comprising a shared bank memory accessed by a central processing unit (CPU) or the processor according to an access authority, wherein the CPU outputs the program code and controls writing of the program code to the shared bank memory and the processor controls writing of the program code from the shared bank memory to the first non-volatile memory.

12. A semiconductor system comprising:

a semiconductor device; and

a central processing unit (CPU) configured to control operation of the semiconductor device,

wherein the semiconductor device comprises;

a first non-volatile memory configured to store a program code; and

a processor configured to copy the program code from the first non-volatile memory to a second non-volatile memory after a solder reflow process is performed.

13. The semiconductor system of claim 12, wherein the semiconductor device further comprises:

a first memory bank configured to be accessed by the CPU;

a second memory bank configured to be accessed by the processor; and

a shared memory bank configured to be accessed by the CPU or the processor according to an access authority,

wherein the program code is input to the semiconductor device and written to the shared memory bank, and processor controls writing of the program code from the shared memory bank to the first non-volatile memory.

14. The semiconductor system of claim 12, wherein the second non-volatile memory is a phase-change memory.

15. The semiconductor system of claim 12, wherein the semiconductor device is a multi-chip package (MCP) semiconductor device.

16. The semiconductor system of claim 12, wherein the solder reflow process is infrared (IR) reflow.

17. The semiconductor system of claim 12, wherein the processor deletes the program code from the first non-volatile memory after the program code is completely copied to the second non-volatile memory.

18. The semiconductor system of claim 12, wherein the semiconductor system is one of a mobile telephone, a smart phone, a personal digital assistant (PDA), a portable multimedia player (PMP), and an information technology (IT) device.

19. The semiconductor system of claim 12, wherein the semiconductor system is a digital camera.

20. The semiconductor system of claim 12, wherein the semiconductor system is a memory card.