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MULTIPLE PROCESSOR SYSTEM AND METHOD INCLUDING MULTIPLE MEMORY HUB MODULES

  • US 20110113189A1
  • Filed: 01/14/2011
  • Published: 05/12/2011
  • Est. Priority Date: 08/28/2003
  • Status: Active Grant
First Claim
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1. A memory module, comprising:

  • a plurality of memory devices; and

    a memory hub comprising;

    a plurality of memory controllers, each of the memory controllers being coupled to at least one of the memory devices in the memory module; and

    a switch having a first plurality of switch ports, a second plurality of switch ports, and a plurality of memory ports coupled to respective ones of the memory controllers, the cross-bar switch being configured to couple each of the switch ports in the first plurality to either any one of the second plurality of switch ports or any one of the memory ports.

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