LIGHT EMITTING DEVICE

• US 20110114917A1
• Filed: 07/21/2008
• Published: 05/19/2011
• Est. Priority Date: 07/21/2008
• Status: Abandoned Application

• Current Assignee: Shaoher X. Pan
• Original Assignee: Shaoher X. Pan
• Inventors: Pan, Shaoher X.
• Application Number:
  US13/054,396
• Publication Number:
  US 20110114917A1
• Time in Patent Office: Days
• US Class Current: 257/13
• CPC Class Codes: H01L 27/156 two-dimensional arrays
• CPC Class Codes: H01L 33/20 with a particular shape, e.g. curved or truncated substrate
• CPC Class Codes: H01L 33/24 of the light emitting region, e.g. non-planar junction

Abstract

A light emitting device includes a substrate having a first surface and a second surface not parallel to the first surface, and a light emission layer disposed over the second surface to emit light. The light emission layer has a light emission surface which is not parallel to the first surface.

Claims

1. A light emitting device comprising:

a substrate having a first surface and a second surface; and

a light emission layer disposed over the second surface to emit light, the light emission layer having a light emission surface which is not parallel to the first surface.

2. The light emitting device of claim 1, wherein the substrate comprises a (100) crystal plane and a (111) crystal plane, wherein the first surface is substantially parallel to the (100) crystal plane of the substrate, and wherein the light emission layer is substantially parallel to the (111) crystal plane of the substrate.

3. The light emitting device of claim 1, wherein the light emission layer comprises a quantum-well layer that is configured to emit light when an electric current is produced in the quantum-well layer.

4. The light emitting device of claim 3, wherein the quantum-well layer comprises a layer formed by a material selected from the group consisting of InN, InGaN, GaN, InAlN, AlInGaN, and AlGaN.

5. The light emitting device of claim 1, further comprising a buffer layer between the substrate and the light emission layer.

6. The light emitting device of claim 5, wherein the buffer layer has a reflectance coefficient higher than 30% in the spectral range of the light emitted by the light emission layer.

7. The light emitting device of claim 6, wherein the buffer layer has a reflectance coefficient higher than 50% in the spectral range of the light emitted by the light emission layer.

8. The light emitting device of claim 5, wherein the buffer layer has a thickness in the range of 200 to 200,000 Angstroms.

9. The light emitting device of claim 5, wherein the buffer layer comprises Al, an Al oxide, an Al nitride, Ag, an Ag oxide, an Ag nitride, Au, an Au oxide, an Au nitride, and an alloy comprising Al, Ag, or Au.

10. The light emitting device of claim 5, wherein the buffer layer comprises a material selected from the group consisting of GaN, ZnO, HfN, AlAs, SiCN, TaN, and SiC.

11. The light emitting device of claim 1, further comprising:

a lower nitride layer between the substrate and the light emission layer; and

an upper nitride layer over the light emission layer.

12. The light emitting device of claim 1, wherein the substrate has a trench formed in the first surface, and wherein the light emission layer is disposed within the trench.

13. The light emitting device of claim 12, wherein the first surface outside of the trench comprises at least one width dimension narrower than 1000 microns.

14. The light emitting device of claim 1, wherein the substrate has a protrusion formed on the first surface, and wherein the light emission layer is disposed on the protrusion.

15. The light emitting device of claim 13, wherein the first surface outside of the protrusion comprises at least one width dimension narrower than 1000 microns.

16. The light emitting device of claim 1, wherein the substrate comprises silicon, gallium nitride, silicon carbide, silicon oxide, or sapphire.

17. The light emitting device of claim 16, wherein the substrate comprises a silicon-on-insulator (SOI) structure or a bi-layer structure having a silicon layer on a glass substrate.

18. A light emitting device, comprising:

a substrate; and

a light emission layer disposed over the substrate to emit light, the light emission layer having a footprint area and having a light emission surface area which is greater than the footprint area.

19. The light emitting device of claim 18, wherein the substrate comprises a trench defined in the first surface, and wherein the light emission layer is disposed within the trench.

20. The light emitting device of claim 19, wherein the first surface outside of the trench comprises at least one width dimension narrower than 1000 microns.

21. The light emitting device of claim 18, wherein the substrate has a protrusion formed on the first surface, and wherein the light emission layer is disposed on the protrusion.

22. The light emitting device of claim 21, wherein the first surface outside of the protrusion comprises at least one width dimension narrower than 1000 microns.

23. The light emitting device of claim 18, wherein the substrate comprises a (100) crystal plane and a (111) crystal plane, wherein the substrate has an upper surface substantially parallel to the 100) crystal plane, and wherein the light emission layer is substantially parallel to the (111) crystal plane of the substrate.

24. The light emitting device of claim 18, wherein the light emission layer comprises a quantum-well layer that is configured to emit light when an electric current is produced in the quantum-well layer.

25. The light emitting device of claim 24, wherein the quantum-well layer comprises a layer formed by a material selected from the group consisting of InN, InGaN, GaN, InAlN, AlInGaN, and AlGaN.

26. The light emitting device of claim 18, further comprising a buffer layer between the substrate and the light emission layer.

27. The light emitting device of claim 18, wherein the buffer layer has a reflectance coefficient higher than 30% in the spectral range of the light emitted by the light emission layer.

28. The light emitting device of claim 27, wherein the buffer layer has a reflectance coefficient higher than 50% in the spectral range of the light emitted by the light emission layer.

29. The light emitting device of claim 18, wherein the buffer layer has a thickness in the range of 200 to 200,000 Angstroms Angstroms.

30. The light emitting device of claim 18, wherein the buffer layer comprises Al, an Al oxide, an Al nitride, Ag, an Ag oxide, an Ag nitride, Au, an Au oxide, an Au nitride, and an alloy comprising Al, Ag, or Au.

31. The light emitting device of claim 18, wherein the buffer layer comprises a material selected from the group consisting of GaN, ZnO, AlN, HfN, AlAs, SiCN, TaN, and SiC.

32. The light emitting device of claim 18, wherein the substrate comprises silicon, gallium nitride, silicon carbide, silicon oxide, or sapphire.

33. The light emitting device of claim 30, wherein the substrate comprises a silicon-on-insulator (SOI) structure or a bi-layer structure having a silicon layer on a glass substrate.

34. A light emitting device comprising:

a substrate having a first surface;

a light emission layer disposed over at least a portion of the substrate, the light emission layer having a light emission surface that is not parallel to the first surface; and

a reflective buffer layer disposed under at least a portion of the light emission layer, to reflect light emitted from the light emission layer, and wherein the reflective buffer layer has a reflectance coefficient higher than 30% in a spectral range of light emitted by the light emission layer.

35. The light emitting device of claim 34, wherein the reflective buffer layer has a thickness in the range of 200 to 200,000 Angstroms Angstroms.

36. The light emitting device of claim 34, wherein the reflective buffer layer comprises Al, an Al oxide, an Al nitride, Ag, an Ag oxide, an Ag nitride, Au, an Au oxide, an Au nitride, and an alloy comprising Al, Ag, or Au.

37. The light emitting device of claim 34, wherein the reflective buffer layer comprises a material selected from the group consisting of GaN, ZnO, AlN, HfN, AlAs, SiCN, TaN, and SiC.

38. The light emitting device of claim 34, wherein the reflective buffer layer has a reflectance coefficient higher than 50% in the spectral range of the light emitted by light emission layer.

39. The light emitting device of claim 38, wherein the reflective buffer layer has a reflectance coefficient higher than 70% in the spectral range of the light emitted by the light emission layer.

40. The light emitting device of claim 34, wherein the substrate has a (100) crystal plane and a (111) crystal plane, wherein the first surface is substantially parallel to the (100) crystal plane, and wherein the light emission surface is substantially parallel to the (111) crystal plane.

41. The light emitting device of claim 34, wherein the substrate has a (100) crystal plane and a (111) crystal plane, wherein the first surface is substantially parallel to the (111) crystal plane, and wherein the light emission surface is substantially parallel to the (100) crystal plane.

42. The light emitting device of claim 34, wherein the substrate comprises a trench defined in the first surface, and wherein the light emission layer is disposed within the trench.

43. The light emitting device of claim 42, wherein the first surface outside of the trench comprises at least one width dimension narrower than 1000 microns.

44. The light emitting device of claim 34, wherein the substrate has a protrusion formed on the first surface, and wherein the light emission layer is disposed on the protrusion.

45. The light emitting device of claim 44, wherein the first surface outside of the protrusion comprises at least one width dimension narrower than 1000 microns.

46. The light emitting device of claim 34, wherein the light emission layer comprises a quantum-well layer that is configured to emit light when an electric current is produced in the quantum-well layer.

47. The light emitting device of claim 46, wherein the quantum-well layer comprises a layer formed by a material selected from the group consisting of InN, InGaN, GaN, InAlN, AlInGaN, and AlGaN.

48. The light emitting device of claim 34, wherein the light emission surface is at an angle between 10 degrees and 90 degrees relative to the first surface.

49. The light emitting device of claim 48, wherein the light emission surface is at an angle between 30 degrees and 60 degrees relative to the first surface.

50. The light emitting device of claim 34, wherein the substrate comprises silicon, gallium nitride, silicon carbide, silicon oxide, or sapphire.

51. The light emitting device of claim 50, wherein the substrate comprises a silicon-on-insulator (SOI) structure or a bi-layer structure having a silicon layer cm a glass substrate.

52. A light emitting device, comprising:

a substrate having a first surface and a trench formed in the first surface; and

a light emission layer disposed within the trench to emit light, the light emission layer having a light emission surface which is not parallel to the first surface, wherein the first surface outside of the trench comprises at least one width dimension narrower than 1000 microns.

53. The light emitting device of claim 52, wherein the trench is defined in part by a first trench surface that is not parallel to the first surface.

54. The light emitting device of claim 53, wherein the substrate has a (100) crystal plane and a (111) crystal plane, wherein the first surface is substantially parallel to the (100) crystal plane, and wherein the first trench surface is substantially parallel to the (111) crystal plane.

55. The light emitting device of claim 53, wherein the substrate has a (100) crystal plane and a (111) crystal plane, wherein the first surface is substantially parallel to the (111) crystal plane of the substrate, and wherein the first trench surface is substantially parallel to the (100) crystal plane of the substrate.

56. The light emitting device of claim 53, wherein the second surface is at an angle between 10 degrees and 90 degrees relative to the first surface.

57. The light emitting device of claim 53, wherein the substrate comprises a silicon-on-insulator (SOI) structure or a bi-layer structure having a silicon layer on a glass substrate.

58. The light emitting device of claim 53, wherein the trench comprises a second trench surface at a bottom of the trench, the second trench surface being substantially parallel to the first surface.

59. The light emitting device of claim 58, wherein the area ratio of the second trench surface to the first trench surface is smaller than 50%.

60. The light emitting device of claim 53, wherein the substrate has a (111) crystal plane, and wherein the trench is defined at least in part by four first trench surfaces substantially parallel to the (111) crystal plane.

61. The light emitting device of claim 53, wherein the trench has the shape of an inverted pyramid or a truncated inverted pyramid.

62. The light emitting device of claim 53, wherein the trench has an opening in the first surface of the substrate, wherein the opening has a width in the range of 100 microns to 100 mm.

63. The light emitting device of claim 53, wherein the trench has an opening in the first surface of the substrate, and wherein the opening has a substantially rectangular shape.

64. The light emitting device of claim 53, wherein the light emission layer comprises a quantum-well layer configured to emit light when an electric current is produced in the quantum-well layer.

65. The light emitting device of claim 52, further comprising a buffer layer between the substrate and the light emission layer.

66. The light emitting device of claim 52, wherein the substrate comprises silicon, gallium nitride, silicon carbide, silicon oxide, or sapphire.

67. A light emitting device, comprising:

a substrate having a first surface and a protrusion formed on the first surface; and

a light emission layer disposed on the protrusion to emit light, the light emission layer having a light emission surface which is not parallel to the first surface.

68. The light emitting device of claim 67, wherein the first surface outside of the protrusion comprises at least one width dimension narrower than 1000 microns.

69. The light emitting device of claim 67, wherein the protrusion is defined in part by a first protrusion surface that is not parallel to the first surface.

70. The light emitting device of claim 67, wherein the substrate has a (100) crystal plane and a (111) crystal plane, wherein the first surface is substantially parallel to the (100) crystal plane, and wherein the first protrusion surface is substantially parallel to the (111) crystal plane.

71. The light emitting device of claim 67, wherein the substrate has a (100) crystal plane and a (111) crystal plane, wherein the first surface is substantially parallel to the (111) crystal plane of the substrate, and wherein the first protrusion surface is substantially parallel to the (100) crystal plane of the substrate.

72. The light emitting device of claim 67, wherein the second surface is at an angle between 10 degrees and 90 degrees relative to the first surface.

73. The light emitting device of claim 72, wherein the first protrusion surface is at an angle between 50 degrees and 60 degrees relative to the first surface of the substrate.

74. The light emitting device of claim 67, wherein the substrate comprises silicon, gallium nitride, silicon carbide, silicon oxide, or sapphire.

75. The light emitting device of claim 74, wherein the substrate comprises a silicon-on-insulator (SOI) structure or a bi-layer structure having a silicon layer on a glass substrate.

76. The light emitting device of claim 67, wherein the protrusion has the shape of a pyramid or a truncated pyramid.

77. A light emitting device, comprising:

a substrate having a first surface;

a trench formed in the substrate, wherein the trench is defined in part by a plurality of first trench surfaces that are not parallel to the first surface;

a reflective buffer layer on at least a portion of the first surface and the plurality of first trench surfaces; and

a light emitting layer over the reflective buffer layer, wherein the light emitting layer is configured to emit light away from the reflective buffer layer, wherein the light emitted is confined in a solid angle smaller than 180 degrees.

78. The light emitting device of claim 77, wherein the light emitted is confined in an angular range narrower than 160 degrees solid angles.

79. The light emitting device of claim 78, wherein the light emitted is confined in an angular range narrower than 120 degrees solid angles.

80. The light emitting device of claim 79, wherein the light emitted is confined in an angular range narrower than 100 degrees solid angles.

81. The light emitting device of claim 77, wherein the substrate has a (100) crystal plane and a (111) crystal plane, wherein the first surface is substantially parallel to the (100) crystal plane, and wherein the first trench surface is substantially parallel to the (111) crystal plane.

82. The light emitting device of claim 81, wherein the first surface outside the trench comprises at least one width narrower than 1000 microns.

83. The light emitting device of claim 77, wherein the first trench surface is at an angle between 10 degrees and 90 degrees relative to the first surface of the substrate.

84. The light emitting device of claim 77, wherein the trench has an opening in the first surface of the substrate, wherein the opening has a width in the range of 100 microns to 100 mm.

85. The light emitting device of claim 77, wherein the trench has an opening in the first surface of the substrate, and wherein the opening has a substantially rectangular shape.

86. The light emitting device of claim 77, wherein the substrate comprises silicon, gallium nitride, silicon carbide, silicon oxide, or sapphire.

87. A method for fabricating a light emitting device, comprising:

forming a light emission layer over a substrate having a first surface and a second surface not parallel to the first surface, wherein the light emission layer has a light emission surface not parallel to the first surface, wherein the light emission layer is configured to emit light.

88. The method of claim 87, further comprising forming a trench in the first surface, wherein the trench is defined in part by a second surface.

89. The method of claim 87, further comprising forming a protrusion on the first surface, wherein the protrusion is defined in part by a second surface.

90. The method of claim 89, wherein the substrate comprises a silicon-on-insulator (SOI) structure or a bi-layer structure having a silicon layer on a glass substrate.

91. The method of claim 87, further comprising forming a buffer layer on at least a portion of the second surface before the step of forming a light emission layer.

92. The method of claim 91, wherein the buffer layer is formed by atomic layer deposition (ALD), Metal Organic Chemical Vapor Deposition (MOCVD), Plasma Enhanced Chemical Vapor Deposition (PECVD), Chemical Vapor Deposition (CVD), Molecular Beam Epitaxy (MBE), or Physical vapor deposition (PVD).

93. The method of claim 91, wherein the buffer layer is deposited on the substrate at a temperature in a range of 550°

C. to 850°

C. or in a range of 850°

C. to 1250°

C.

94. The method of claim 91, wherein the buffer layer comprises a material selected from the group consisting of GaN, ZnO, AlN, HfN, AlAs, SiCN, TaN, and SiC.

95. The method of claim 91, wherein the buffer layer has a reflectance coefficient higher than 30% in the spectral range of the light emitted by the light emission layer.

96. The method of claim 91, wherein the buffer layer comprises Al, an Al oxide, an Al nitride, Ag, an Ag oxide, an Ag nitride, Au, an Au oxide, an Au nitride, and an alloy comprising Al, Ag, or Au.

97. The method of claim 91, further comprising:

forming a lower nitride layer on the buffer layer before the step of forming a light emission layer; and

forming an upper nitride layer on the light emission layer.

98. The method of claim 97, further comprising:

forming a lower electrode on the lower nitride layer; and

forming an upper electrode on the tin oxide layer.

99. The method of claim 87, wherein the light emission layer comprises one or more quantum-well layers configured to emit light when an electric current is produced in the quantum-well layer.

100. The method of claim 99, wherein the quantum-well layer comprises a layer formed by a material selected from the group consisting of InN, InGaN, GaN, InAlN, AlInGaN, and AlGaN.

101. The method of claim 87, wherein the substrate has a (100) crystal plane and a (111) crystal plane, wherein the first surface is substantially parallel to the (100) crystal plane, and wherein the first trench surface is substantially parallel to the (111) crystal plane.

102. The method of claim 87, wherein the second surface is at an angle between 10 degrees and 90 degrees relative to the first surface.

103. The method of claim 87, wherein the substrate comprises a glass substrate, silicon-on-insulator (SOI), and a silicon layer on the glass substrate.

104. The method of claim 87, wherein the substrate comprises silicon, gallium nitride, silicon carbide, silicon oxide, or sapphire.