SEMICONDUCTOR DEVICE

• US 20110115555A1
• Filed: 01/28/2011
• Published: 05/19/2011
• Est. Priority Date: 10/17/2006
• Status: Active Grant

• Current Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Original Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Inventors: Kurokawa, Yoshiyuki
• Granted Patent: US 8,060,052 B2
• Time in Patent Office: Days
• US Class Current: 327/538
• CPC Class Codes: G06K 19/0723 the record carrier comprising an arrangement for non-contact communication, e.g. wireless communication circuits on transponder cards, non-contact smart cards or RFIDs
• CPC Class Codes: G06K 19/07767 the first and second communication means being two different antennas types, e.g. dipole and coil type, or two antennas of the same kind but operating at different frequencies
• CPC Class Codes: G11C 5/142 Contactless power supplies, e.g. RF, induction, or IR
• CPC Class Codes: H02J 50/10 using inductive coupling
• CPC Class Codes: H02J 50/27 characterised by the type of receiving antennas, e.g. rectennas
• CPC Class Codes: H02J 50/40 using two or more transmitting or receiving devices H02J50/50 takes precedence
• CPC Class Codes: H02M 7/103 Containing passive elements (capacitively coupled) which are ordered in cascade on one source

Abstract

In an RF tag, a mask ROM or a flash memory is used for storing data such as an ID number. Although the mask ROM can be realized at a low price, rewriting is not possible. In addition, in the flash memory, although electric rewriting is possible, production cost increases. Accordingly, it is difficult to provide an RF tag by which data rewriting is possible at a low price. An RF tag is provided with a power supply circuit having a function to generate a power supply voltage from a weak radio signal and a memory which can hold data stored in a data holding portion by the power supply voltage. With the above structure, a high-performance RF tag capable of rewriting data such as an ID number after production can be provided at a low price.

Claims

1. A semiconductor device comprising:

a first conductor over a substrate, the first conductor being capable of being electrically connected to a first device wirelessly;

a first power supply circuit electrically connected to the first conductor;

a second conductor over the substrate, the second conductor being capable of being electrically connected to a second device wirelessly; and

a second power supply circuit electrically connected to the second conductor;

wherein the second conductor is lateral to the first conductor so that the second conductor does not overlap with the first conductor.

2. The semiconductor device according to claim 1,

wherein the first power supply circuit is configured to generate a first voltage from a first power received by the first conductor, and

wherein the second power supply circuit is configured to generate a second voltage from a second power received by the second conductor.

3. The semiconductor device according to claim 2,

wherein the first voltage is higher than the second voltage.

4. The semiconductor device according to claim 3, further comprising a first circuit and a second circuit,

wherein the first circuit is configured to operate using the first voltage, and

wherein the second circuit is configured to operate using the second voltage.

5. The semiconductor device according to claim 1,

wherein each of the first conductor and the second conductor is an antenna circuit.

6. The semiconductor device according to claim 1,

wherein the first power supply circuit comprises a charge pump circuit.

7. The semiconductor device according to claim 2,

wherein the first power supply circuit is configured to generate the first voltage by converting a signal received by the first conductor into a direct voltage and boosting the direct voltage.

8. The semiconductor device according to claim 4,

wherein the first circuit is a data holding portion of a memory circuit, and

wherein the second circuit is a write control portion of the memory circuit.

9. The semiconductor device according to claim 8,

wherein the data holding portion comprises a flip-flop circuit.

10. The semiconductor device according to claim 8,

wherein the memory circuit is a static random access memory.

11. A semiconductor device comprising:

a first conductor configured to receive a first power wirelessly;

a first power supply circuit configured to generate a first voltage from the first power received by the first conductor;

a first circuit configured to operate using the first voltage;

a second conductor configured to receive a second power wirelessly;

a second power supply circuit configured to generate a second voltage from the second power received by the second conductor; and

a second circuit configured to operate using the second voltage,

wherein the first voltage is higher than the second voltage.

12. The semiconductor device according to claim 11,

wherein each of the first conductor and the second conductor is an antenna circuit.

13. The semiconductor device according to claim 11,

wherein the first power supply circuit comprises a charge pump circuit.

14. The semiconductor device according to claim 11,

wherein the first power supply circuit is configured to generate the first voltage by converting a signal received by the first conductor into a direct voltage and boosting the direct voltage.

15. The semiconductor device according to claim 11,

wherein the first circuit is a data holding portion of a memory circuit, and

wherein the second circuit is a write control portion of the memory circuit.

16. The semiconductor device according to claim 15,

wherein the data holding portion comprises a flip-flop circuit.

17. The semiconductor device according to claim 15,

wherein the memory circuit is a static random access memory.