MODE INDICATOR FOR INTERFEROMETRIC MODULATOR DISPLAYS

• US 20110115690A1
• Filed: 01/26/2011
• Published: 05/19/2011
• Est. Priority Date: 04/17/2006
• Status: Active Grant

• Current Assignee: Snaptrack Incorporated (Qualcomm, Inc.)
• Original Assignee: Qualcomm MEMS Technologies Incorporated (Qualcomm, Inc.)
• Inventors: Cummings, William
• Granted Patent: US 8,441,412 B2
• Time in Patent Office: Days
• US Class Current: 345/3.1
• CPC Class Codes: G09G 2300/0473 Use of light emitting or modulating elements having two or more stable states when no power is applied
• CPC Class Codes: G09G 2310/04 Partial updating of the display screen
• CPC Class Codes: G09G 2310/06 Details of flat display driving waveforms
• CPC Class Codes: G09G 2330/021 Power management, e.g. power saving
• CPC Class Codes: G09G 2360/02 Graphics controller able to handle multiple formats, e.g. input or output formats
• CPC Class Codes: G09G 2370/045 using multiple communication channels, e.g. parallel and serial
• CPC Class Codes: G09G 3/20 for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
• CPC Class Codes: G09G 3/2018 by time modulation using two or more time intervals
• CPC Class Codes: G09G 3/3466 based on interferometric effect

Abstract

A method and apparatus for displaying data on bi-stable and non-bi-stable displays is provided. The apparatus includes a controller chip capable of being connected to a non-bi-stable display through a first interface channel and also capable of being connected to a bi-stable display via the first interface channel and an additional second interface channel. When connected the non-bi-stable display, the second interface channel is not connected. The second interface channel may carry mode information bits to the bi-stable display module to allow the bi-stable display to utilize power-saving features.

Claims

1. A display device comprising:

a processor configured to;

receive image data for display on a display that is operable in a plurality of modes, wherein the plurality of modes comprises at least two of the following modes;

a display data unchanged mode, a full frame update mode, a high bit depth mode, a low bit depth mode, a charge balance update necessary mode, a low power mode, a partial frame update mode, and an error mode;

receive mode data indicative of one of the plurality of modes; and

control display of the image data on the display in accordance with the mode data.

2. The display device of claim 1, wherein the processor is configured to receive the image data and the mode data serially over a serial bus.

3. The display device of claim 1, wherein the processor is configured to receive the image data and the mode data in parallel over a parallel bus.

4. The display device of claim 1, wherein the mode data comprises a plurality of bits.

5. The display device of claim 1, wherein the image data comprises a frame of data and the mode data is associated with the frame of data.

6. The display device of claim 1, wherein the image data comprises a line of a frame of data and the mode data is associated with only the line of the frame of data.

7. The display device of claim 1, wherein the processor comprises an array driver.

8. The display device of claim 1, wherein the processor comprises a driver controller.

9. A display device comprising:

means for receiving image data for display on a display that is operable in a plurality of modes, wherein the plurality of modes comprises at least two of the following modes;

a display data unchanged mode, a full frame update mode, a high bit depth mode, a low bit depth mode, a charge balance update necessary mode, a low power mode, a partial frame update mode, and an error mode;

means for receiving mode data indicative of one of the plurality of modes; and

means for controlling display of the image data on the display in accordance with the mode data.

10. The display device of claim 9, wherein the mode data comprises a plurality of bits.

11. The display device of claim 9, wherein the image data comprises a frame of data and the mode data is associated with the frame of data.

12. The display device of claim 9, wherein the image data comprises a line of a frame of data and the mode data is associated with only the line of the frame of data.

13. A method of operating a display, the method comprising:

receiving image data for display on a display that is operable in a plurality of modes, wherein the plurality of modes comprises at least two of the following modes;

a display data unchanged mode, a full frame update mode, a high bit depth mode, a low bit depth mode, a charge balance update necessary mode, a low power mode, a partial frame update mode, and an error mode;

receiving mode data indicative of one of the plurality of modes; and

controlling display of the image data on the display in accordance with the mode data.

14. The method of claim 13, further comprising receiving the image data and the mode data serially.

15. The method of claim 13, further comprising receiving the image data and the mode data in parallel.

16. The method of claim 13, wherein the mode data comprises a plurality of bits.

17. The method of claim 13, wherein the image data comprises a frame of data and the mode data is associated with the frame of data.

18. The method of claim 13, wherein the image data comprises a line of a frame of data and the mode data is associated with only the line of the frame of data.