BACKSIDE ILLUMINATED IMAGE SENSOR WITH REDUCED DARK CURRENT

• US 20110115957A1
• Filed: 01/25/2011
• Published: 05/19/2011
• Est. Priority Date: 07/09/2008
• Status: Abandoned Application

• Current Assignee: Omnivision Technologies Incorporated (Will Semiconductor Co., Ltd. Shanghai)
• Original Assignee: Omnivision Technologies Incorporated (Will Semiconductor Co., Ltd. Shanghai)
• Inventors: Brady, Frederick T., McCarten, John P.
• Application Number:
  US13/012,843
• Publication Number:
  US 20110115957A1
• Time in Patent Office: Days
• US Class Current: 348/302
• CPC Class Codes: H01L 21/84 the substrate being other than a semiconductor body, e.g. being an insulating body
• CPC Class Codes: H01L 27/1203 the substrate comprising an insulating body on a semiconductor body, e.g. SOI three-dimensional layout H01L27/0688
• CPC Class Codes: H01L 27/14601 Structural or functional details thereof
• CPC Class Codes: H01L 27/1464 Back illuminated imager structures
• CPC Class Codes: H01L 27/14683 Processes or apparatus peculiar to the manufacture or treatment of these devices or parts thereof not peculiar thereto H01L21/00

Abstract

A backside illuminated image sensor comprises a sensor layer implementing a plurality of photosensitive elements of a pixel array, and an oxide layer adjacent a backside surface of the sensor layer. The sensor layer comprises a seed layer and an epitaxial layer formed over the seed layer, with the seed layer having a cross-sectional doping profile in which a designated dopant is substantially confined to a pixel array area of the sensor layer. The doping profile advantageously reduces dark current generated at an interface between the sensor layer and the oxide layer. The image sensor may be implemented in a digital camera or other type of digital imaging device.

Claims

1. An image sensor having a pixel array configured for backside illumination, comprising:

a sensor layer comprising a plurality of photosensitive elements of the pixel array; and

an oxide layer adjacent a backside surface of the sensor layer;

wherein the sensor layer comprises a seed layer and an epitaxial layer formed over the seed layer, the seed layer having a cross-sectional doping profile in which a designated dopant is substantially confined to a pixel array area of the sensor layer.

2. The image sensor of claim 1 wherein the dopant is an n-type dopant comprising one of arsenic and phosphorus.

3. The image sensor of claim 1 wherein the dopant is a p-type dopant comprising one of boron and indium.

4. The image sensor of claim 1 wherein the dopant is implanted into the seed layer through a sacrificial oxide layer that is formed over the seed layer and removed prior to formation of the epitaxial layer over the seed layer.

5. The image sensor of claim 1 wherein the dopant is implanted into the seed layer through an opening etched in a sacrificial oxide layer in the pixel array area and wherein the sacrificial oxide layer is removed prior to formation of the epitaxial layer over the seed layer.

6. The mage sensor of claim 1 wherein said image sensor comprises a CMOS image sensor.

7. A digital imaging device comprising:

an image sensor having a pixel array configured for backside illumination; and

one or more processing elements configured to process outputs of the image sensor to generate a digital image;

wherein said image sensor comprises;

a sensor layer comprising a plurality of photosensitive elements of the pixel array; and

an oxide layer adjacent a backside surface of the sensor layer;

wherein the sensor layer comprises a seed layer and an epitaxial layer formed over the seed layer, the seed layer having a cross-sectional doping profile in which a designated dopant is substantially confined to a pixel array area of the sensor layer.

8. The digital imaging device of claim 7 wherein said imaging device comprises a digital camera.