METHOD OF OPERATING INTEGRATED CIRCUIT EMBEDDED WITH NON-VOLATILE PROGRAMMABLE MEMORY HAVING VARIABLE COUPLING RELATED APPLICATION DATA

• US 20110116314A1
• Filed: 01/21/2011
• Published: 05/19/2011
• Est. Priority Date: 11/14/2007
• Status: Active Grant

• Current Assignee: Invensas Corporation
• Original Assignee: Invensas Corporation
• Inventors: Gross, John Nicholas, Liu, David K.Y.
• Granted Patent: US 8,325,519 B2
• Time in Patent Office: Days
• US Class Current: 365/185.03
• CPC Class Codes: G11C 16/0408 comprising cells containing floating gate transistors G11C16/0483, G11C16/0491 take precedence
• CPC Class Codes: G11C 16/0416 comprising cells containing a single floating gate transistor and no select transistor, e.g. UV EPROM
• CPC Class Codes: G11C 2216/10 Floating gate memory cells with a single polysilicon layer
• CPC Class Codes: H01L 29/0696 of cellular field-effect devices, e.g. multicellular DMOS transistors or IGBTs
• CPC Class Codes: H01L 29/42324 Gate electrodes for transistors with a floating gate
• CPC Class Codes: H01L 29/7883 charging by tunnelling of carriers, e.g. Fowler-Nordheim tunnelling
• CPC Class Codes: H10B 41/30 characterised by the memory core region
• CPC Class Codes: H10B 41/60 the control gate being a doped region, e.g. single-poly memory cell
• CPC Class Codes: H10B 69/00 Erasable-and-programmable ROM [EPROM] devices not provided for in groups H10B41/00 - H10B63/00, e.g. ultraviolet erasable-and-programmable ROM [UVEPROM] devices

Abstract

A programmable non-volatile device is operated with a floating gate that functions as a FET gate that overlaps a portion of a source/drain region and allows for variable coupling through geometry and/or biasing conditions. This allows a programming voltage for the device to be imparted to the floating gate through variable capacitive coupling, thus changing the state of the device. Multi-state embodiments are also possible. The invention can be used in environments such as data encryption, reference trimming, manufacturing ID, security ID, and many other applications.

Claims

1. A method of operating a one-time programmable (OTP) device situated on a substrate comprising:

providing a floating gate;

wherein said floating gate is comprised of a material that is also shared by an interconnect and/or another gate for a transistor device also situated on the substrate and associated with a logic gate and/or a volatile memory;

providing a source region; and

providing a drain region overlapping a variable portion of said floating gate and capacitively coupled thereto;

wherein an amount of capacitive coupling can be adjusted based on one of altering a number of N (N>

1) separate drain regions selected to overlap said floating gate and/or a variable programming voltage;

setting a threshold of said floating gate by selecting said variable programming voltage and/or which of said N separate drain regions provide a current of channel hot electrons.

2. The method of claim 1, wherein N=2 and said threshold of said floating gate can be set to one of four (4) different values.

3. The method of claim 1, wherein N=2 and said threshold of said floating gate can be set to one of three (3) different values.

4. The method of claim 1, wherein N=3 and said threshold of said floating gate can be set to one of eight (8) different values.

5. The method of claim 1, wherein N=2 and said threshold of said floating gate can be set to one of more than 2 but less than 8 different values.

6. The method of claim 1, wherein said threshold is determined by a read voltage applied to one or more of said N separate drain regions.

7. The method of claim 6, wherein said read voltage is controlled to have a range of values which vary in time corresponding to threshold states of said floating gate.

8. A method of operating a non-volatile programmable (NVP) device situated on a substrate comprising:

providing a floating gate, which floating gate is comprised of a layer and material that is shared by gates of at least some other non-NVP devices on said substrate;

programming the NVP device to a first state with channel hot electrons that alter a voltage threshold of a floating gate;

wherein said channel hot electrons are provided by one of a variable number of drain regions and/or a variable program voltage which can be coupled to said floating gate;

reading the first state in the OTP device using a bias current to detect said voltage threshold; and

erasing the NVP device with band-band tunneling hot hole injection.

9. A method of operating a programmable non-volatile device comprising:

providing a floating gate;

wherein said floating gate is comprised of a material that is also used as a gate for a transistor device also situated on the substrate and associated with a logic gate and/or a volatile memory;

providing a source region; and

providing a drain region including at least a first drain region and a second separate drain region; and

capacitively coupling a variable portion of said gate to said drain based on selectively coupling either or both of said first drain region and said second separate drain region;

providing a programming voltage to said drain region, wherein a substantial portion of said programming voltage is also imparted to said floating gate through said capacitive coupling and in an amount corresponding to said selective coupling.

10. A method of operating a multi-level programmable non-volatile device comprising:

providing a floating gate;

wherein said floating gate is comprised of a material that is also used as a gate for a transistor device also situated on the substrate and associated with a logic gate and/or a volatile memory;

providing a source region; and

providing a drain region including at least a first drain region and a second separate drain region; and

capacitively coupling a variable portion of said gate to said drain based on selectively coupling either or both of said first drain region and said second separate drain region;

providing a variable programming voltage to said drain region, wherein a substantial portion of said variable programming voltage is also imparted to said floating gate through said capacitive coupling and in an amount corresponding to said selective coupling;

wherein said floating gate is adapted to store multiple levels of charge corresponding to said variable programming voltage.