MEMORY SYSTEM AND MEMORY MANAGEMENT METHOD INCLUDING THE SAME

• US 20110119477A1
• Filed: 01/26/2011
• Published: 05/19/2011
• Est. Priority Date: 12/06/2005
• Status: Active Grant

• Current Assignee: Gyoo-Cheol Hwang, Sung-Jae Byun, Young Min Lee, Yun-Tae Lee
• Original Assignee: Gyoo-Cheol Hwang, Sung-Jae Byun, Young Min Lee, Yun-Tae Lee
• Inventors: Byun, Sung-Jae, Lee, Young Min, Hwang, Gyoo-Cheol, Lee, Yun-Tae
• Granted Patent: US 8,423,755 B2
• Time in Patent Office: Days
• US Class Current: 713/2
• CPC Class Codes: G06F 12/0607 Interleaved addressing
• CPC Class Codes: G06F 15/177 Initialisation or configuration control processor initialisation G06F9/4405
• CPC Class Codes: G06F 9/4405 Initialisation of multiprocessor systems
• CPC Class Codes: G11C 8/16 Multiple access memory array, e.g. addressing one storage element via at least two independent addressing line groups
• CPC Class Codes: Y02D 10/00 Energy efficient computing, e.g. low power processors, power management or thermal management

Abstract

A multi-processor system includes a first processor, a second processor communicable with the first processor, a first non-volatile memory for storing first codes and second codes to respectively boot the first and second processors, the first memory communicable with the first processor, a second volatile memory designated for the first processor, a third volatile memory designated for the second processor, and a fourth volatile memory shared by the first and second processors.

Claims

1. A method for booting a system including a first processor and a second processor, comprising:

fetching a first code in a first memory to boot the first processor;

fetching a start code in the first memory by the first processor;

releasing a reset state of the second processor;

transmitting the start code from the first processor to the second processor via a communication channel between the first processor and the second processor;

fetching a second code in the first memory by the first processor; and

storing the fetched second code in a second memory; and

starting the second processor based on the start code.