Flash Memory Device Error Correction Code Controllers and Related Methods and Memory Systems
First Claim
1. A method for correcting errors in data that is stored in a memory device, the method comprising:
- reading the data along with first error correction code (ECC) data and second ECC data from the memory device;
determining a number of errors in the read data; and
selecting one of the first ECC data or the second ECC data for use in correcting the errors in the read data based on the determined number of the errors.
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Abstract
An ECC controller for a flash memory device storing M-bit data (M: a positive integer equal to or greater than 2) includes an encoder and a decoder. The encoder generates first ECC data for input data to be stored in the flash memory device using a first error correction scheme and generates second ECC data for the input data using a second error correction scheme. The input data, the first ECC data, and the second ECC data are stored in the flash memory device. The decoder calculates the number of errors in data read from the flash memory device and corrects the errors in the read data using one of the first ECC data and the second ECC data selectively based on the number of the errors.
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Citations
20 Claims
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1. A method for correcting errors in data that is stored in a memory device, the method comprising:
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reading the data along with first error correction code (ECC) data and second ECC data from the memory device; determining a number of errors in the read data; and selecting one of the first ECC data or the second ECC data for use in correcting the errors in the read data based on the determined number of the errors. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11)
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12. A memory device, comprising:
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a memory cell array; and an error correction code (ECC) circuit that is configured to generate first error correction code data and second ECC data that corresponds to data read from the memory cell array, wherein the ECC circuit is further configured to select one of the first ECC data or the second ECC data for use in correcting the errors in the data read from the memory cell array based on a determined number of errors in the data read from the memory cell array. - View Dependent Claims (13, 14, 15, 16, 17, 18, 19, 20)
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Specification