Semiconductor Device and Manufacturing Method Thereof

• US 20110121290A1
• Filed: 01/21/2011
• Published: 05/26/2011
• Est. Priority Date: 09/29/2005
• Status: Abandoned Application

• Current Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Original Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Inventors: Honda, Tatsuya, Sone, Norihito, Akimoto, Kengo
• Application Number:
  US13/011,128
• Publication Number:
  US 20110121290A1
• Time in Patent Office: Days
• US Class Current: 257/43
• CPC Class Codes: H01L 21/02164 the material being a silicon oxide, e.g. SiO2
• CPC Class Codes: H01L 21/0217 the material being a silicon nitride not containing oxygen, e.g. SixNy or SixByNz H01L21/02126 and H01L21/0214 take precedence
• CPC Class Codes: H01L 21/02178 the material containing aluminium, e.g. Al2O3
• CPC Class Codes: H01L 21/02266 deposition by physical ablation of a target, e.g. sputtering, reactive sputtering, physical vapour deposition or pulsed laser deposition
• CPC Class Codes: H01L 21/02554 Oxides
• CPC Class Codes: H01L 21/02565 Oxide semiconducting materials not being Group 12/16 materials, e.g. ternary compounds
• CPC Class Codes: H01L 21/02631 Physical deposition at reduced pressure, e.g. MBE, sputtering, evaporation
• CPC Class Codes: H01L 21/02667 Crystallisation or recrystallisation of non-monocrystalline semiconductor materials, e.g. regrowth
• CPC Class Codes: H01L 21/428 using electromagnetic radiation, e.g. laser radiation
• CPC Class Codes: H01L 21/465 Chemical or electrical treatment, e.g. electrolytic etching to form insulating layers H01L21/469
• CPC Class Codes: H01L 21/477 Thermal treatment for modifying the properties of semiconductor bodies, e.g. annealing, sintering H01L21/38 - H01L21/449 and H01L21/461 - H01L21/475 take precedence
• CPC Class Codes: H01L 27/1225 with semiconductor materials not belonging to the group IV of the periodic table, e.g. InGaZnO
• CPC Class Codes: H01L 27/1285 using control of the annealing or irradiation parameters, e.g. using different scanning direction or intensity for different transistors
• CPC Class Codes: H01L 29/04 characterised by their crystalline structure, e.g. polycrystalline, cubic or particular orientation of crystalline planes characterised by physical imperfections H01L29/30
• CPC Class Codes: H01L 29/045 by their particular orientation of crystalline planes
• CPC Class Codes: H01L 29/66969 of devices having semiconductor bodies not comprising group 14 or group 13/15 materials comprising selenium or tellurium in uncombined form other than as impurities in semiconductor bodies of other materials, comprising cuprous oxide or cuprous iodide H01L21/02365
• CPC Class Codes: H01L 29/7869 having a semiconductor body comprising an oxide semiconductor material, e.g. zinc oxide, copper aluminium oxide, cadmium stannate
• CPC Class Codes: H01L 29/78693 the semiconducting oxide being amorphous
• CPC Class Codes: H01L 29/78696 characterised by the structure of the channel, e.g. multichannel, transverse or longitudinal shape, length or width, doping structure, or the overlap or alignment between the channel and the gate, the source or the drain, or the contacting structure of the channel H01L29/78612 takes precedence; transistors having a drain offset region or a lightly doped drain [LDD] H01L29/78621

Abstract

An object is to provide a semiconductor device of which a manufacturing process is not complicated and by which cost can be suppressed, by forming a thin film transistor using an oxide semiconductor film typified by zinc oxide, and a manufacturing method thereof. For the semiconductor device, a gate electrode is formed over a substrate; a gate insulating film is formed covering the gate electrode; an oxide semiconductor film is formed over the gate insulating film; and a first conductive film and a second conductive film are formed over the oxide semiconductor film. The oxide semiconductor film has at least a crystallized region in a channel region.

Claims

1-38. -38. (canceled)

39. A semiconductor device comprising:

a gate electrode;

a gate insulating film adjacent to the gate electrode;

an oxide semiconductor layer including a channel region adjacent to the gate electrode with the gate insulating film therebetween, the oxide semiconductor layer having crystallinity; and

wherein the channel region is substantially intrinsic.

40. The semiconductor device according to claim 39, wherein the oxide semiconductor layer comprises an In—

Ga—

Zn—

O based oxide semiconductor.

41. The semiconductor device according to claim 39, wherein the gate electrode comprises one selected from the group consisting of tantalum, tungsten, titanium, molybdenum, chromium and niobium.

42. The semiconductor device according to claim 39, wherein the channel region of the oxide semiconductor layer has an equal number of negative and positive charges.

43. The semiconductor device according to claim 39, wherein the channel region of the oxide semiconductor layer is added with an impurity imparting p-type conductivity.

44. The semiconductor device according to claim 39 wherein the oxide semiconductor layer includes zinc.

45. A semiconductor device comprising:

a gate electrode;

a gate insulating film adjacent to the gate electrode;

an oxide semiconductor layer including a channel region adjacent to the gate electrode with the gate insulating film therebetween, the oxide semiconductor layer having crystallinity;

a source electrode and a drain electrode in electrical contact with the oxide semiconductor layer; and

a pixel electrode electrically connected to one of the source electrode and the drain electrode,

wherein the channel region is substantially intrinsic.

46. The semiconductor device according to claim 45, wherein the oxide semiconductor layer comprises an In—

Ga—

Zn—

O based oxide semiconductor.

47. The semiconductor device according to claim 45, wherein the gate electrode comprises one selected from the group consisting of tantalum, tungsten, titanium, molybdenum, chromium and niobium.

48. The semiconductor device according to claim 45, wherein the channel region of the oxide semiconductor layer has an equal number of negative and positive charges.

49. The semiconductor device according to claim 45, wherein the channel region of the oxide semiconductor layer is added with an impurity imparting p-type conductivity.

50. The semiconductor device according to claim 45, wherein each of the source electrode and the drain electrode comprises a metal or a metal nitride, and

wherein the metal is selected from the group consisting of aluminum (Al), tungsten (W), molybdenum (Mo), zirconium (Zr), hafnium (Hf), vanadium (V), niobium (Nb), tantalum (Ta), copper (Cu), chromium (Cr), cobalt (Co), nickel (Ni), platinum (Pt), titanium (Ti), or neodymium (Nd).

51. The semiconductor device according to claim 45, wherein each of the source electrode and the drain electrode comprises a metal or a metal nitride, and

wherein the metal is titanium and the metal nitride is titanium nitride.

52. The semiconductor device according to claim 45 wherein the oxide semiconductor layer includes zinc.

53. A semiconductor device comprising:

a gate electrode;

a gate insulating film over the gate electrode;

an oxide semiconductor layer including a channel region over the gate electrode with the gate insulating film therebetween, the oxide semiconductor layer having crystallinity; and

wherein the channel region is substantially intrinsic.

54. The semiconductor device according to claim 53, wherein the oxide semiconductor layer comprises an In—

Ga—

Zn—

O based oxide semiconductor.

55. The semiconductor device according to claim 53, wherein the gate electrode comprises one selected from the group consisting of tantalum, tungsten, titanium, molybdenum, chromium and niobium.

56. The semiconductor device according to claim 53, wherein the channel region of the oxide semiconductor layer has an equal number of negative and positive charges.

57. The semiconductor device according to claim 53, wherein the channel region of the oxide semiconductor layer is added with an impurity imparting p-type conductivity.

58. The semiconductor device according to claim 53 wherein the oxide semiconductor layer includes zinc.

59. A semiconductor device including a transistor comprising:

a gate electrode;

a gate insulating film adjacent to the gate electrode;

an oxide semiconductor layer including a channel region adjacent to the gate electrode with the gate insulating film therebetween, the oxide semiconductor layer having crystallinity; and

wherein the channel region is substantially intrinsic, and

wherein the transistor is a top gate type transistor.

60. The semiconductor device according to claim 59, wherein the oxide semiconductor layer comprises an In—

Ga—

Zn—

O based oxide semiconductor.

61. The semiconductor device according to claim 59, wherein the gate electrode comprises one selected from the group consisting of tantalum, tungsten, titanium, molybdenum, chromium and niobium.

62. The semiconductor device according to claim 59, wherein the channel region of the oxide semiconductor layer has an equal number of negative and positive charges.

63. The semiconductor device according to claim 59, wherein the channel region of the oxide semiconductor layer is added with an impurity imparting p-type conductivity.

64. The semiconductor device according to claim 59 wherein the oxide semiconductor layer includes zinc.

65. A semiconductor device comprising:

a gate electrode;

a gate insulating film adjacent to the gate electrode;

an oxide semiconductor layer including a channel region adjacent to the gate electrode with the gate insulating film therebetween, the oxide semiconductor layer including indium and having crystallinity; and

wherein the channel region is substantially intrinsic.

66. The semiconductor device according to claim 65, wherein the gate electrode comprises one selected from the group consisting of tantalum, tungsten, titanium, molybdenum, chromium and niobium.

67. The semiconductor device according to claim 65, wherein the channel region of the oxide semiconductor layer has an equal number of negative and positive charges.

68. The semiconductor device according to claim 65, wherein the channel region of the oxide semiconductor layer is added with an impurity imparting p-type conductivity.

69. The semiconductor device according to claim 65 wherein the oxide semiconductor layer includes zinc.

70. A semiconductor device comprising:

a gate electrode;

a gate insulating film adjacent to the gate electrode;

an oxide semiconductor layer including a channel region adjacent to the gate electrode with the gate insulating film therebetween, the oxide semiconductor layer including indium and having crystallinity;

a source electrode and a drain electrode in electrical contact with the oxide semiconductor layer; and

a pixel electrode electrically connected to one of the source electrode and the drain electrode,

wherein the channel region is substantially intrinsic.

71. The semiconductor device according to claim 70, wherein the gate electrode comprises one selected from the group consisting of tantalum, tungsten, titanium, molybdenum, chromium and niobium.

72. The semiconductor device according to claim 70, wherein the channel region of the oxide semiconductor layer has an equal number of negative and positive charges.

73. The semiconductor device according to claim 70, wherein the channel region of the oxide semiconductor layer is added with an impurity imparting p-type conductivity.

74. The semiconductor device according to claim 70 wherein the oxide semiconductor layer includes zinc.

75. A semiconductor device comprising:

a gate electrode;

a gate insulating film over the gate electrode;

an oxide semiconductor layer including a channel region over the gate electrode with the gate insulating film therebetween, the oxide semiconductor layer including indium and having crystallinity; and

wherein the channel region is substantially intrinsic.

76. The semiconductor device according to claim 75, wherein the gate electrode comprises one selected from the group consisting of tantalum, tungsten, titanium, molybdenum, chromium and niobium.

77. The semiconductor device according to claim 75, wherein the channel region of the oxide semiconductor layer has an equal number of negative and positive charges.

78. The semiconductor device according to claim 75, wherein the channel region of the oxide semiconductor layer is added with an impurity imparting p-type conductivity.

79. The semiconductor device according to claim 75 wherein the oxide semiconductor layer includes zinc.

80. A semiconductor device including a transistor comprising:

a gate electrode;

a gate insulating film adjacent to the gate electrode;

an oxide semiconductor layer including a channel region adjacent to the gate electrode with the gate insulating film therebetween, the oxide semiconductor layer including indium and having crystallinity; and

wherein the channel region is substantially intrinsic, and

wherein the transistor is a top gate type transistor.

81. The semiconductor device according to claim 80, wherein the gate electrode comprises one selected from the group consisting of tantalum, tungsten, titanium, molybdenum, chromium and niobium.

82. The semiconductor device according to claim 80, wherein the channel region of the oxide semiconductor layer has an equal number of negative and positive charges.

83. The semiconductor device according to claim 80, wherein the channel region of the oxide semiconductor layer is added with an impurity imparting p-type conductivity.

84. The semiconductor device according to claim 80 wherein the oxide semiconductor layer includes zinc.