TWO-WIRE DIMMER SWITCH FOR LOW-POWER LOADS

• US 20110121752A1
• Filed: 11/23/2010
• Published: 05/26/2011
• Est. Priority Date: 11/25/2009
• Status: Active Grant

• Current Assignee: Lutron Technology Company LLC
• Original Assignee: Lutron Electronics Company Incorporated (Lutron Electronics)
• Inventors: Newman, Robert C. JR., Salvestrini, Christopher James
• Granted Patent: US 8,664,881 B2
• Time in Patent Office: Days
• US Class Current: 315/291
• CPC Class Codes: G05F 3/08 wherein the variable is dc
• CPC Class Codes: H02M 7/06 using discharge tubes without control electrode or semiconductor devices without control electrode
• CPC Class Codes: H05B 39/04 Controlling
• CPC Class Codes: H05B 39/048 with reverse phase control
• CPC Class Codes: H05B 45/10 Controlling the intensity of the light
• CPC Class Codes: H05B 47/10 Controlling the light source
• CPC Class Codes: Y02B 20/00 Energy efficient lighting technologies, e.g. halogen lamps or gas discharge lamps

Abstract

A two-wire load control device (such as, a dimmer switch) is operable to control the amount of power delivered from an AC power source to an electrical load (such as, a high-efficiency lighting load) and has substantially no minimum load requirement. The dimmer switch includes a bidirectional semiconductor switch, which is operable to be rendered conductive each half-cycle and to remain conductive independent of the magnitude of a load current conducted through semiconductor switch. The dimmer switch comprises a control circuit that conducts a control current through the load in order to generate a gate drive signal for rendering the bidirectional semiconductor switch conductive and non-conductive each half-cycle. The control circuit may provide a constant gate drive to the bidirectional semiconductor switch after the bidirectional semiconductor switch is rendered conductive each half-cycle. The bidirectional semiconductor switch may comprise, for example, a triac or two field-effect transistors coupled in anti-series connection.

Claims

1. A load control device for controlling the amount of power delivered from an AC power source to an electrical load to a desired amount of power, the load control device comprising:

a bidirectional semiconductor switch adapted to be coupled in series electrical connection between the AC power source and the electrical load for conducting a load current from the AC power source to the electrical load, the bidirectional semiconductor switch having a control input for rendering the bidirectional semiconductor switch conductive and non-conductive; and

a control circuit receiving a signal representative of a voltage developed across the bidirectional semiconductor switch, the control circuit operable to determine a half-cycle start time near the beginning of a half-cycle of the AC power source in response to the signal representative of the voltage developed across the bidirectional semiconductor switch;

wherein the control circuit;

conducts a control current through the load so as to generate a gate drive signal that is operatively coupled to the control input of the bidirectional semiconductor switch;

drives the gate drive signal to a first magnitude to render the bidirectional semiconductor switch conductive after a first variable amount of time has elapsed since the half-cycle start time;

maintains the gate drive signal at the first magnitude after the bidirectional semiconductor switch is rendered conductive, such that the bidirectional semiconductor switch remains conductive independent of the magnitude of the load current conducted through the bidirectional semiconductor switch;

drives the gate drive signal to a second magnitude to render the bidirectional semiconductor switch non-conductive after a second fixed amount of time has elapsed since the half-cycle start time;

controls the second fixed amount of time to be approximately equal during each half-cycle of the AC power source;

varies the first variable amount of time in response to the desired amount of power to be delivered to the load to thus control the amount of power delivered to the load to the desired amount.

2. The load control device of claim 1, wherein the control circuit comprises:

a timing circuit for generating a timing signal that increases in magnitude with respect to time, the timing circuit starting to generate the timing signal at the half-cycle start time; and

a drive circuit for receiving the timing voltage and rendering the bidirectional semiconductor switch conductive each half-cycle in response to the magnitude of the timing signal, so as to control the amount of power delivered to the electrical load to the desired amount;

wherein the timing circuit is operable to continue generating the timing signal after the bidirectional semiconductor switch is rendered conductive each half-cycle, such that the drive circuit continues to render the bidirectional semiconductor switch conductive and the bidirectional semiconductor switch remains conductive independent of the magnitude of the load current conducted through the bidirectional semiconductor switch.

3. The load control device of claim 2, wherein the timing signal increases in magnitude with respect to time at a constant rate.

4. The load control device of claim 3, wherein the timing circuit stops generating the timing signal after the second fixed amount of time has elapsed since the half-cycle start time.

5. The load control device of claim 4, wherein the drive circuit drives the gate drive signal to the first magnitude to render the bidirectional semiconductor switch conductive when the magnitude of the timing signal exceeds a variable threshold representative of the desired amount of power to be delivered to the load.

6. The load control device of claim 5, further comprising:

an intensity adjustment actuator adapted to be actuated for adjusting the desired amount of power delivered to the load;

wherein the variable threshold of the drive circuit is adjusted in response to the intensity adjustment actuator.

7. The load control device of claim 5, wherein the drive circuit drives the gate drive signal to the second magnitude to render the bidirectional semiconductor switch non-conductive when the timing circuit stops generating the timing signal.

8. The load control device of claim 4, wherein the first variable amount of time has a length that is not dependent upon the length of the second fixed amount of time that the timing circuit generates the timing signal.

9. The load control device of claim 1, further comprising:

a rectifier circuit for receiving the voltage developed across the bidirectional semiconductor switch and generating a rectified voltage;

wherein the signal representative of a voltage developed across the bidirectional semiconductor switch comprises the rectified voltage generated by the rectifier circuit.

10. The load control device of claim 9, wherein the control circuit is operable to determine the half-cycle start time in response to the magnitude of the rectified voltage exceeding a threshold when the rectified voltage is increasing in magnitude with respect to time, such that the half-cycle start time occurs after the beginning of a half-cycle of the AC power source.

11. The load control device of claim 10, wherein the control circuit comprises a microprocessor.

12. The load control device of claim 11, further comprising:

an intensity adjustment actuator adapted to be actuated for adjusting the desired amount of power delivered to the load;

wherein the microprocessor is operable to determine the desired amount of power to be delivered to the load in response to the intensity adjustment actuator.

13. The load control device of claim 12, wherein the control circuit comprises raise and lower tactile switches coupled to the microprocessor, and the intensity adjustment actuator comprises a rocker switch for actuating the raise and lower tactile switches for respectively increasing and decreasing the desired amount of power to be delivered to the load.

14. The load control device of claim 12, wherein the control circuit comprises a potentiometer coupled to the microprocessor, and the intensity adjustment actuator comprises a slider knob mechanically coupled to the potentiometer, such that the potentiometer generates a DC voltage representative of the desired amount of power to be delivered to the load.

15. The load control device of claim 11, further comprising:

an RF receiver coupled to the microprocessor and operable to receive an RF signal;

herein the microprocessor is operable to determine the desired amount of power to be delivered to the load in response to the intensity adjustment actuator.

16. The load control device of claim 11, wherein the control circuit further comprises a power supply for generating a DC supply voltage for powering the microprocessor, the power supply coupled to conduct a charging current through a storage capacitor and the load when the bidirectional semiconductor switch is non-conductive in order to generate the DC supply voltage across the storage capacitor, the charging current making up a portion of the control current of the control circuit.

17. The load control device of claim 1, wherein the control circuit drives the gate drive signal to the second magnitude to render the bidirectional semiconductor switch non-conductive prior to the end of the present half-cycle.

18. The load control device of claim 17, wherein the half-cycle start time occurs after the beginning of a half-cycle of the AC power source, such that a dead time exists between the time when the control circuit drives the gate drive signal to the second magnitude to render the bidirectional semiconductor switch non-conductive during a first half-cycle and the time when the control circuit determines the half-cycle start time in a second half-cycle immediately following the first half-cycle.

19. The load control device of claim 17, wherein the bidirectional semiconductor switch comprises a triac.

20. The load control device of claim 1, wherein the bidirectional semiconductor switch comprises first and second switching transistors coupled in anti-series connection.

21. The load control device of claim 20, wherein the first and second switching transistors comprise first and second FETs.

22. The load control device of claim 21, wherein the control circuit renders both the first and second FETs conductive and non-conductive at the same times each half-cycle to control the amount of power delivered to the load.

23. The load control device of claim 1, wherein the control circuit further comprises a power supply for generating a DC supply voltage across a storage capacitor, the power supply coupled to conduct a charging current through the load when the bidirectional semiconductor switch is non-conductive in order to generate the DC supply voltage, the charging current making up at least a portion of the control current of the control circuit;

wherein the DC supply voltage allows the control circuit to maintain the gate drive signal at the first magnitude after the bidirectional semiconductor switch is rendered conductive, so that the bidirectional semiconductor switch remains conductive independent of the magnitude of the load current conducted through the bidirectional semiconductor switch.

24. The load control device of claim 1, wherein the electrical load comprises a high-efficiency lighting load and the load control device comprises a dimmer switch.

25. A load control device for controlling the amount of power delivered from an AC power source to an electrical load to a desired amount of power, the load control device comprising:

a bidirectional semiconductor switch adapted to be coupled in series electrical connection between the AC power source and the electrical load for conducting a load current from the AC power source to the electrical load, the bidirectional semiconductor switch having a control input for rendering the bidirectional semiconductor switch conductive and non-conductive; and

a control circuit operable to conduct a control current through the load in order to render the bidirectional semiconductor switch conductive and non-conductive each half-cycle of the AC power source, the control circuit including a timing circuit for generating a timing signal that increases in magnitude with respect to time, the timing circuit starting to generate the timing signal at a start time shortly after a zero-crossing of the AC power source, the control circuit also including a drive circuit for receiving the timing signal and rendering the bidirectional semiconductor switch conductive each half-cycle in response to the magnitude of the timing signal, so as to control the amount of power delivered to the electrical load to the desired amount;

wherein the timing circuit is operable to continue generating the timing signal after the bidirectional semiconductor switch is rendered conductive each half-cycle, such that the drive circuit continues to render the bidirectional semiconductor switch conductive and the bidirectional semiconductor switch remains conductive independent of the magnitude of the load current conducted through the bidirectional semiconductor switch.

26. The load control device of claim 25, wherein the timing signal increases in magnitude with respect to time at a constant rate.

27. The load control device of claim 26, wherein the timing circuit stops generating the timing signal when the magnitude of the timing signal exceeds a maximum magnitude, such that the timing circuit stops generating the timing signal after a fixed amount of time has elapsed since the start time.

28. The load control device of claim 27, wherein the drive circuit generates a gate drive signal that is operatively coupled to the control input of the bidirectional semiconductor switch, and drives the gate drive signal to a first magnitude to render the bidirectional semiconductor switch conductive when the magnitude of the timing signal exceeds a variable threshold representative of the desired amount of power to be delivered to the load, such that the bidirectional semiconductor switch is rendered conductive after a variable amount of time has elapsed since the start time of the timing signal.

29. The load control device of claim 28, wherein the drive circuit maintains the gate drive signal at the first magnitude after the bidirectional semiconductor switch is rendered conductive, such that bidirectional semiconductor switch remains conductive independent of the magnitude of the load current conducted through the bidirectional semiconductor switch, the drive circuit further driving the gate drive signal to a second magnitude to render the bidirectional semiconductor switch non-conductive when the timing circuit stops generating the timing signal after the fixed amount of time has elapsed since the start time.

30. The load control device of claim 29, wherein the drive circuit drives the gate drive signal to the second magnitude to render the bidirectional semiconductor switch non-conductive prior to the end of the present half-cycle.

31. The load control device of claim 30, wherein the start time of the timing signal occurs after the beginning of a half-cycle of the AC power source, such that a dead time exists between the time when the drive circuit drives the gate drive signal to the second magnitude to render the bidirectional semiconductor switch non-conductive during a first half-cycle and the time when the timing circuit determines the start time in a subsequent half-cycle.

32. The load control device of claim 28, further comprising:

an intensity adjustment actuator adapted to be actuated for adjusting the desired amount of power delivered to the load;

wherein the variable threshold of the drive circuit is adjusted in response to the intensity adjustment actuator.

33. The load control device of claim 28, wherein the variable amount of time has a length that is not dependent upon the length of the fixed amount of time that the timing circuit generates the timing signal.

34. The load control device of claim 25, wherein the control circuit receives a signal representative of a voltage developed across the bidirectional semiconductor switch, the control circuit operable to determine the start time of the timing signal in response to the signal representative of the voltage developed across the bidirectional semiconductor switch.

35. The load control device of claim 34, further comprising:

a rectifier circuit for receiving the voltage developed across the bidirectional semiconductor switch and generating a rectified voltage;

wherein the signal representative of a voltage developed across the bidirectional semiconductor switch comprises the rectified voltage generated by the rectifier circuit.

36. The load control device of claim 35, wherein the control circuit is operable to determine the start time of the timing signal in response to the magnitude of the rectified voltage exceeding a threshold when the rectified voltage is increasing in magnitude with respect to time, such that the start time occurs after the beginning of a half-cycle of the AC power source.

37. The load control device of claim 25, wherein the bidirectional semiconductor switch comprises first and second switching transistors coupled in anti-series connection.

38. The load control device of claim 37, wherein the first and second switching transistors comprise first and second FETs.

39. The load control device of claim 38, wherein the control circuit renders both the first and second FETs conductive and non-conductive at the same time each half-cycle to control the amount of power delivered to the load.

40. The load control device of claim 25, wherein the control circuit further comprises a power supply for generating a DC supply voltage across a storage capacitor, the power supply coupled to conduct a charging current through the load when the bidirectional semiconductor switch is non-conductive in order to generate the DC supply voltage, the charging current making up at least a portion of the control current of the control circuit.

41. The load control device of claim 40, wherein the timing circuit conducts a timing current from the storage capacitor of the power supply, such that the timing circuit is operable to continue generating the timing signal after the bidirectional semiconductor switch is rendered conductive each half-cycle.

42. The load control device of claim 41, wherein the bidirectional semiconductor switch comprises a triac, the load control device further comprising:

a gate coupling circuit for receiving the gate drive signal from the drive circuit and rendering the triac conductive in response to the gate drive signal, the gate coupling circuit comprising an opto-coupler having an input photodiode coupled to drive circuit and an output photodiode coupled to the control input of the triac;

wherein the input photodiode conducts a drive current from the storage capacitor of the power supply in order to render the triac conductive and maintain the triac conductive in response to the gate drive signal.

43. The load control device of claim 25, wherein the electrical load comprises a high-efficiency lighting load and the load control device comprises a dimmer switch.

44. A load control device for controlling the amount of power delivered from an AC power source to an electrical load to a desired amount of power, the load control device comprising:

a bidirectional semiconductor switch adapted to be coupled in series electrical connection between the AC power source and the electrical load for conducting a load current from the AC power source to the electrical load, the bidirectional semiconductor switch having a control input for rendering the bidirectional semiconductor switch conductive and non-conductive; and

a timing circuit operable to conduct a timing current through the load so as to generate a timing signal, the timing circuit operable to begin generating the timing signal at a start time shortly after a zero-crossing of the AC power source, the timing signal increasing in magnitude with respect to time at a constant rate; and

a drive circuit for receiving the timing signal and rendering the bidirectional semiconductor switch conductive when the magnitude of the timing signal exceeds a variable threshold representative of the desired amount of power to be delivered to the load;

wherein the timing circuit is operable to continue generating the timing signal after the bidirectional semiconductor switch is rendered conductive each half-cycle, such that the drive circuit continues to render the bidirectional semiconductor switch conductive and the bidirectional semiconductor switch remains conductive independent of the magnitude of the load current conducted through the bidirectional semiconductor switch, the timing circuit operable to stop generating the timing signal after a fixed amount of time has elapsed since the start time in order to render the bidirectional semiconductor switch non-conductive.

45. The load control device of claim 44, wherein the drive circuit generates a gate drive signal that is operatively coupled to the control input of the bidirectional semiconductor switch, and drives the gate drive signal to a first magnitude to render the bidirectional semiconductor switch conductive when the magnitude of the timing signal exceeds the variable threshold, such that the bidirectional semiconductor switch is rendered conductive after a variable amount of time has elapsed since the start time of the timing signal.

46. The load control device of claim 45, wherein the drive circuit maintains the gate drive signal at the first magnitude after the bidirectional semiconductor switch is rendered conductive, such that bidirectional semiconductor switch remains conductive independent of the magnitude of the load current conducted through the bidirectional semiconductor switch, the drive circuit further driving the gate drive signal to a second magnitude to render the bidirectional semiconductor switch non-conductive when the timing circuit stops generating the timing signal after the fixed amount of time has elapsed since the start time.

47. The load control device of claim 46, wherein the drive circuit drives the gate drive signal to the second magnitude to render the bidirectional semiconductor switch non-conductive prior to the end of the present half-cycle.

48. The load control device of claim 45, wherein the variable amount of time has a length that is not dependent upon the length of the fixed amount of time that the timing circuit generates the timing signal.

49. The load control device of claim 44, further comprising:

an intensity adjustment actuator adapted to be actuated for adjusting the desired amount of power delivered to the load;

wherein the variable threshold of the drive circuit is adjusted in response to the intensity adjustment actuator.

50. The load control device of claim 44, wherein the control circuit further comprises a power supply for generating a DC supply voltage across a storage capacitor, the power supply coupled to conduct a charging current through the load when the bidirectional semiconductor switch is non-conductive in order to generate the DC supply voltage, the charging current making up at least a portion of the control current of the control circuit;

wherein the DC supply voltage allows the control circuit to maintain the gate drive signal at the first magnitude after the bidirectional semiconductor switch is rendered conductive, so that the bidirectional semiconductor switch remains conductive independent of the magnitude of the load current conducted through the bidirectional semiconductor switch.

51. A control circuit for a two-wire load control device for controlling the amount of power delivered from an AC power source to an electrical load, the load control device having a bidirectional semiconductor switch adapted to be coupled in series electrical connection between the AC power source and the electrical load and having a control input for rendering the bidirectional semiconductor switch conductive and non-conductive, the control circuit comprising:

a timing circuit for generating a timing signal that increases in magnitude with respect to time, the timing circuit starting to generate the timing signal at a start time shortly after a zero-crossing of the AC power source, the timing circuit ceasing to generate the timing signal after a fixed amount of time has elapsed since the start time; and

a drive circuit for receiving the timing signal and generating a gate drive signal that is operatively coupled to the control input of the bidirectional semiconductor switch, the drive circuit driving the gate drive signal to a first magnitude to render the bidirectional semiconductor switch conductive when the magnitude of the timing signal exceeds a trigger threshold, the drive circuit maintaining the gate drive signal at the first magnitude after the bidirectional semiconductor switch is rendered conductive, the drive circuit driving the gate drive signal to a second magnitude to render the bidirectional semiconductor switch non-conductive when the timing circuit ceases generating the timing signal, such that the gate drive signal is controlled to the first magnitude for a conduction time;

wherein the control circuit conducts a control current through the load to enable the timing circuit to generate the timing signal and the drive circuit to generate the gate drive signal, and the conduction time of the gate drive signal has a length that is not dependent upon the length of the fixed amount of time that the timing circuit generates the timing signal.

52. The control circuit of claim 51, wherein the control circuit comprises a one-shot circuit coupled to the timing signal for ceasing to generate the timing signal after the fixed amount of time has elapsed since the start time.

53. The control circuit of claim 52, wherein the one-shot circuit controls the magnitude of the timing circuit to be approximately zero volts when the magnitude of the timing signal exceeds a maximum magnitude.

54. The control circuit of claim 53, wherein the timing circuit comprises a reset circuit coupled to the timing signal for starting to generate the timing signal at the start time.

55. The control circuit of claim 54, wherein the reset circuit receives a signal representative of a voltage developed across the bidirectional semiconductor switch, the reset circuit operable to determine the start time of the timing signal in response to the signal representative of the voltage developed across the bidirectional semiconductor switch.

56. The control circuit of claim 55, wherein the signal representative of the voltage developed across the bidirectional semiconductor switch comprises a rectified voltage.

57. The control circuit of claim 56, wherein the reset circuit is operable to determine the start time of the timing signal in response to the magnitude of the rectified voltage exceeding a threshold when the rectified voltage is increasing in magnitude with respect to time.

58. The control circuit of claim 54, wherein the one-shot circuit is coupled to the reset circuit for preventing the reset circuit from restarting the generating of the timing signal prior to the end of the present half-cycle.

59. The control circuit of claim 52, wherein the one-shot circuit is operable to cease the generation of the timing signal prior to the end of the present half-cycle.

60. The control circuit of claim 59, wherein a dead time exists between the time when the one-shot circuit ceases to generate the timing signal during the present half-cycle and the time when the reset circuit starts to generate the timing signal at the start time during the next, subsequent half-cycle.

61. The control circuit of claim 51, wherein the timing circuit comprises a constant current source for conducting a constant current through a capacitor, such that the timing signal is generated across the capacitor and increases in magnitude with respect to time at a constant rate.

62. The control circuit of claim 61, wherein the drive circuit comprises a variable-threshold trigger circuit receiving a variable threshold voltage representative of a desired amount of power to be delivered to the load.

63. The control circuit of claim 62, wherein the variable-threshold trigger circuit comprises a comparator for generating the gate drive signal, the comparator comparing the magnitude of the timing signal to the magnitude of the variable threshold voltage, the comparator operable to drive the gate drive signal to the first magnitude when the magnitude of the timing signal exceeds the magnitude of the variable threshold voltage, and to drive the gate drive signal to the second magnitude when the magnitude of the timing signal drops below the magnitude of the variable threshold voltage, such that the gate drive signal is controlled to the first magnitude for the conduction time.

64. The control circuit of claim 51, further comprising:

a power supply for generating a DC supply voltage across a storage capacitor, the power supply coupled to conduct a charging current through the load when the bidirectional semiconductor switch is non-conductive in order to generate the DC supply voltage, the charging current making up at least a portion of the control current of the control circuit.

65. The control circuit of claim 64, wherein the timing circuit conducts a timing current from the storage capacitor, such that the timing circuit is operable to continue generating the timing signal after the bidirectional semiconductor switch is rendered conductive each half-cycle.

66. The control circuit of claim 65, wherein the bidirectional semiconductor switch comprises a triac, and the drive circuit is operable to conduct a drive current from the storage capacitor in order in order to render the triac conductive and maintain the triac conductive each half-cycle.

67. A timing circuit for generating a timing signal in a load control device to determine for controlling the amount of power delivered from an AC power source to an electrical load, the timing signal used to determine when a bidirectional semiconductor switch of the load control device is rendered conductive and non-conductive, the timing circuit comprising:

a constant ramp circuit for generating the timing signal, such that the timing signal increases in magnitude with respect to time at a constant rate;

a reset circuit coupled to the timing signal for starting to generate the timing signal at a start time shortly after a zero-crossing of the AC power source; and

a one-shot circuit coupled to the timing signal for ceasing to generate the timing signal prior to the end of the present half-cycle after a fixed amount of time has elapsed since the start time;

wherein a dead time exists between the time when the one-shot circuit ceases to generate the timing signal during the present half-cycle and the time when the reset circuit starts to generate the timing signal at the start time during the next, subsequent half-cycle.

68. The timing circuit of claim 67, wherein the one-shot circuit controls the magnitude of the timing signal to be approximately zero volts in response to the magnitude of the timing signal exceeding a maximum magnitude.

69. The timing circuit of claim 68, wherein the one-shot circuit is coupled to the reset circuit for preventing the reset circuit from restarting the generating of the timing signal prior to the end of the present half-cycle and ensuring that the reset circuit only starts the timing signal once each half-cycle.

70. The timing circuit of claim 67, wherein the reset circuit receives a signal representative of a voltage developed across the bidirectional semiconductor switch, the reset circuit operable to determine the start time of the timing signal in response to the signal representative of the voltage developed across the bidirectional semiconductor switch.

71. The timing circuit of claim 70, wherein the signal representative of the voltage developed across the bidirectional semiconductor switch comprises a rectified voltage, the reset circuit operable to determine the start time of the timing signal in response to the magnitude of the rectified voltage exceeding a reset threshold when the rectified voltage is increasing in magnitude with respect to time.

72. The timing circuit of claim 67, wherein the constant ramp circuit comprises a constant current source for conducting a constant current through a capacitor, such that the timing signal is generated across the capacitor and increases in magnitude with respect to time at the constant rate.

73. A lighting control system adapted to be coupled to an AC power source, the lighting control system comprising:

a high-efficiency lighting load including a high-efficiency light source and a load regulation device electrically coupled to the high-efficiency light source for controlling the amount of power delivered to the high-efficiency light source, the load regulation device characterized by a capacitive impedance; and

a two-wire dimmer switch adapted to be coupled between the AC power source and the high-efficiency lighting load, the dimmer switch comprising a bidirectional semiconductor switch adapted to be coupled in series electrical connection between the AC power source and the high-efficiency lighting load for conducting a load current from the AC power source to the high-efficiency lighting load, the dimmer switch further comprising a control circuit operable to conduct a control current through the high-efficiency lighting load in order to render the bidirectional semiconductor switch conductive each half-cycle of the AC power source;

wherein the bidirectional semiconductor switch remains conductive independent of the magnitude of the load current conducted through the bidirectional semiconductor switch, and is operable to conduct the load current to and from the high-efficiency lighting load during a single half-cycle of the AC power source.

74. The lighting control system of claim 73, wherein the control circuit of the dimmer switch generates a gate drive signal for driving the bidirectional semiconductor switch to be conductive and non-conductive, the control circuit continuing to generate the gate drive signal after the bidirectional semiconductor switch is rendering conductive in a present half-cycle until approximately the end of the present half-cycle.

75. The lighting control system of claim 74, wherein bidirectional semiconductor switch of the dimmer switch comprises a triac.

76. The lighting control system of claim 75, wherein the control circuit stops generating the gate drive signal prior to the end of the present half-cycle.

77. The lighting control system of claim 73, wherein the bidirectional semiconductor switch of the dimmer switch comprises first and second FETs coupled in anti-series connection.

78. The lighting control system of claim 77, wherein the control circuit renders both the first and second FETs conductive and non-conductive at the same times each half-cycle to control the amount of power delivered to the high-efficiency lighting load.

79. The lighting control system of claim 73, wherein the high-efficiency lighting load comprises an artificial load circuit adapted to conduct at least a portion of the control current through the bidirectional semiconductor switch of the dimmer switch.

80. The lighting control system of claim 73, wherein the high-efficiency light source comprises an LED light source, and the load regulation circuit comprises an LED driver.

81. The lighting control system of claim 73, wherein the high-efficiency light source comprises a compact fluorescent lamp, and the load regulation circuit comprises an electronic dimming ballast.

82. A lighting control system adapted to be coupled to an AC power source, the lighting control system comprising:

a high-efficiency lighting load including a high-efficiency light source and a load regulation device electrically coupled to the high-efficiency light source for controlling the amount of power delivered to the high-efficiency light source, the load regulation device characterized by a capacitive impedance; and

a two-wire dimmer switch adapted to be coupled between the AC power source and the high-efficiency lighting load, the dimmer switch having electrical connections consisting of a hot terminal adapted to be coupled to the AC power source and a dimmed-hot terminal adapted to be coupled to the high-efficiency lighting load, the dimmer switch comprising a bidirectional semiconductor switch adapted to be coupled in series electrical connection between the AC power source and the high-efficiency lighting load for conducting a load current from the AC power source to the high-efficiency lighting load;

wherein the bidirectional semiconductor switch is operable to be rendered conductive each half-cycle of the AC power source and to remain conductive independent of the magnitude of the load current conducted through the bidirectional semiconductor switch, the bidirectional semiconductor switch further operable to conduct the load current to and from the high-efficiency light source during a single half-cycle of the AC power source.

83. A method for controlling the amount of power delivered from an AC power source to an electrical load to a desired amount of power, the method comprising:

conducting a load current from the AC power source to the electrical load;

controllably rendering a bidirectional semiconductor switch conductive and non-conductive so as control the load current and the amount of power delivered to the load;

receiving a signal representative of a voltage developed across the bidirectional semiconductor switch;

determining a half-cycle start time near the beginning of a half-cycle of the AC power source in response to the signal representative of the voltage developed across the bidirectional semiconductor switch;

conducting a control current through the load so as to generate a gate drive signal that is operatively coupled to a control input of the bidirectional semiconductor switch;

driving the gate drive signal to a first magnitude to render the bidirectional semiconductor switch conductive after a first variable amount of time has elapsed since the half-cycle start time;

maintaining the gate drive signal at the first magnitude after the bidirectional semiconductor switch is rendered conductive, such that the bidirectional semiconductor switch remains conductive independent of the magnitude of the load current conducted through the bidirectional semiconductor switch;

driving the gate drive signal to a second magnitude to render the bidirectional semiconductor switch non-conductive after a second fixed amount of time has elapsed since the half-cycle start time;

controlling the second fixed amount of time to be approximately equal during each half-cycle of the AC power source; and

varying the first variable amount of time in response to the desired amount of power to be delivered to the load to thus control the amount of power delivered to the load to the desired amount.

84. The method of claim 83, further comprising:

generating a timing signal that increases in magnitude with respect to time at a constant rate, the timing signal starting at the half-cycle start time;

rendering the bidirectional semiconductor switch conductive each half-cycle in response to the magnitude of the timing signal, so as to control the amount of power delivered to the electrical load to the desired amount;

continuing to generate the timing signal after the bidirectional semiconductor switch is rendered conductive each half-cycle, such that the bidirectional semiconductor switch remains conductive independent of the magnitude of the load current conducted through the bidirectional semiconductor switch.

85. The method of claim 84, further comprising:

stopping generating the timing signal after the second fixed amount of time has elapsed since the half-cycle start time.

86. The method of claim 85, wherein driving the gate drive signal to a first magnitude further comprises driving the gate drive signal to the first magnitude to render the bidirectional semiconductor switch conductive when the magnitude of the timing signal exceeds a variable threshold representative of the desired amount of power to be delivered to the load.

87. The method of claim 85, wherein driving the gate drive signal to a second magnitude further comprises driving the gate drive signal to the second magnitude to render the bidirectional semiconductor switch non-conductive in response to the step of stopping generating the timing signal.

88. The method of claim 83, further comprising:

generating a rectified voltage;

wherein receiving a signal representative of a voltage developed across the bidirectional semiconductor switch comprises receiving the rectified voltage.

89. The method of claim 88, wherein determining a half-cycle start time further comprises determine if the magnitude of the rectified voltage has exceeded a threshold when the rectified voltage is increasing in magnitude with respect to time, such that the half-cycle start time occurs after the beginning of a half-cycle of the AC power source.

90. The method of claim 88, further comprising:

conducting a charging current through the load when the bidirectional semiconductor switch is non-conductive in order to generate a DC supply voltage across a storage capacitor, the charging current making up at least a portion of the control current of the control circuit;

wherein the DC supply voltage allows the gate drive signal to be maintained at the first magnitude after the bidirectional semiconductor switch is rendered conductive, such that the bidirectional semiconductor switch remains conductive independent of the magnitude of the load current conducted through the bidirectional semiconductor switch.

91. A two-wire load control device for controlling the amount of power delivered from an AC power source to an electrical load to a desired amount of power, the load control device comprising:

a bidirectional semiconductor switch adapted to be coupled in series electrical connection between the AC power source and the electrical load for conducting a load current from the AC power source to the electrical load, the bidirectional semiconductor switch operable to be rendered conductive and to remain conductive independent of the magnitude of the load current conducted through the semiconductor switch;

an analog control circuit coupled so as to conduct a control current through the electrical load and to generate a timing voltage that increases in magnitude with respect to time; and

a drive circuit for receiving the timing voltage and rendering the bidirectional semiconductor switch conductive and non-conductive each half-cycle, so as to control the amount of power delivered to the electrical load to the desired amount.

92. The load control device of claim 91, wherein the bidirectional semiconductor switch comprises first and second switching transistors coupled in anti-series connection.

93. The load control device of claim 92, wherein the first and second switching transistors comprise first and second FETs.

94. The load control device of claim 93, wherein the drive circuit renders both the first and second FETs conductive and non-conductive at the same time each half-cycle to control the amount of power delivered to the load.

95. The load control device of claim 94, wherein the analog control circuit comprises a timing circuit and the timing voltage increases in magnitude with respect to time at a constant rate,

96. The load control device of claim 95, wherein the timing circuit starts to generate the timing voltage at a start time shortly after a zero-crossing of the AC power source, the timing circuit continuing to generate the timing voltage after the bidirectional semiconductor switch is rendered conductive each half-cycle, such that the drive circuit continues to render the bidirectional semiconductor switch conductive and the bidirectional semiconductor switch remains conductive independent of the magnitude of the load current conducted through the bidirectional semiconductor switch.

97. The load control device of claim 96, wherein the timing circuit stops generating the timing voltage when the magnitude of the timing voltage exceeds a maximum magnitude.

98. The load control device of claim 97, wherein the drive circuit generates a drive voltage that is operatively coupled to the control input of the bidirectional semiconductor switch, and drives the gate drive signal to a first magnitude to render the bidirectional semiconductor switch conductive when the magnitude of the timing signal exceeds a variable threshold.

99. The load control device of claim 98, wherein the drive circuit maintains the drive voltage at the first magnitude after the bidirectional semiconductor switch is rendered conductive, such that bidirectional semiconductor switch remains conductive independent of the magnitude of the load current conducted through the bidirectional semiconductor switch, the drive circuit further driving the drive voltage to a second magnitude to render the bidirectional semiconductor switch non-conductive when the timing circuit stops generating the timing voltage after a fixed amount of time has elapsed since the start time.

100. The load control device of claim 96, wherein the timing circuit receives a signal representative of a voltage developed across the bidirectional semiconductor switch, the timing circuit operable to determine the start time of the timing voltage in response to the signal representative of the voltage developed across the bidirectional semiconductor switch.

101. The load control device of claim 100, wherein the signal representative of a voltage developed across the bidirectional semiconductor switch comprises a rectified voltage.

102. The load control device of claim 101, wherein the timing circuit is operable to determine the start time of the timing voltage in response to the magnitude of the rectified voltage exceeding a threshold when the rectified voltage is increasing in magnitude with respect to time.

103. The load control device of claim 93, wherein the analog control circuit comprises a timing circuit and the timing voltage increases at a rate that is representative of the desired amount of power to be delivered to the load.

104. The load control device of claim 94, further comprising:

a voltage reference circuit for generating a reference voltage, the timing circuit receiving the reference voltage for generating the timing voltage.

105. The load control device of claim 104, wherein the voltage reference circuit comprises a pass-transistor circuit followed by a snap-on circuit.

106. The load control device of claim 104, further comprising:

first and second gate resistors coupled between the gate drive circuit and the gates of the first and second FETs, respectively;

wherein the gate drive circuit is operable to couple the reference voltage to the gates of the FETs through the gate resistors to render the FETs conductive at the beginning of each half-cycle.

107. The load control device of claim 94, wherein the analog control circuit comprises a timing capacitor across which the timing voltage is generated, and a current source for conducting a timing current through the timing capacitor, such that the timing voltage increases with respect to time at a rate dependent upon the magnitude the timing current.

108. The load control device of claim 107, wherein the analog control circuit comprises a potentiometer coupled such that the magnitude of the timing current of the current source changes in response to changes in the resistance of the potentiometer.

109. The load control device of claim 94, wherein the gate drive circuit is operable to render the FETs conductive at the beginning of each half-cycle, and to render the FETs non-conductive at some time during each half-cycle in response to the timing voltage using reverse phase-control dimming.

110. The load control device of claim 94, further comprising:

a voltage compensation circuit for adjusting the magnitude of the timing voltage in response to the magnitude of an AC line voltage of the AC power source.

111. The load control device of claim 93, wherein the drive circuit independently renders the first FET conductive during the positive half-cycles and the second FET conductive during the negative half-cycles to control the amount of power delivered to the load.

112. The load control device of claim 111, wherein the analog control circuit comprises a timing circuit and the timing voltage increases at a rate that is representative of the desired amount of power to be delivered to the load.

113. The load control device of claim 112, wherein the drive circuit comprises a first SR latch having an output coupled to the gate of the first FET and a second SR latch having an output coupled to the gate of the second FET;

and

wherein the set input of the first SR latch is coupled to the reset input of the second SR latch, and the set input of the second SR latch is coupled to the reset input of the first SR latch, such that the FETs are rendered conductive in a complementary manner.

114. The load control device of claim 113, wherein the drive circuit further comprises a triggering circuit operable to conduct a pulse of current in response to the timing voltage, the drive circuit further comprising a first optocoupler having an input photodiode operable to conduct the pulse of current of the triggering circuit during the positive half-cycles, and a second optocoupler having an input photodiode operable to conduct the pulse of current of the triggering circuit during the negative half-cycles.

115. The load control device of claim 114, wherein the first optocoupler has an output coupled to the set input of the first SR latch and to the reset input of the second SR latch for rendering the first FET conductive and the second FET non-conductive during the positive half-cycles, the second optocoupler having an output coupled to the set input of the second SR latch and the reset input of the first SR latch for rendering the second FET conductive and the first FET non-conductive during the negative half-cycles.

116. The load control device of claim 113, further comprising:

a power supply for generating a DC supply voltage for powering the first and second SR latches.

117. The load control device of claim 112, wherein the drive circuit comprises a first capacitor coupled to a control input of the first FET for rendering the first FET conductive during the positive half-cycles, and a second capacitor coupled to a control input of the second FET for rendering the second FET conductive during the negative half-cycles.

118. The load control device of claim 117, wherein the drive circuit comprises a first pulse transformer having a secondary winding coupled to the first capacitor, a second pulse transformer having a secondary winding coupled to the second capacitor, and a triggering circuit coupled in series with primary windings of the first and second pulse transformers, the triggering circuit operable to conduct a pulse of current through the primary windings of the pulse transformers in response to the timing voltage for charging the first capacitor during the positive half-cycles and the second capacitor during the negative half-cycles.

119. The load control device of claim 118, wherein the voltage across the first capacitor is controlled to approximately zero volts to render the first FET non-conductive at approximately the same time that the second capacitor charges from the secondary winding of the second pulse transformer to render the second FET conductive during the negative half-cycles;

and

the voltage across the second capacitor is controlled to approximately zero volts to render the second FET non-conductive at approximately the same time that the first capacitor charges from the secondary winding of the first pulse transformer to render the first FET conductive during the positive half-cycles.

120. The load control device of claim 117, wherein the drive circuit comprises a diac and a pulse transformer having a single primary winding coupled in series with the diac, the pulse transformer further comprising a secondary winding having a center tap connection, the first capacitor operatively coupled between the center tap connection and a first end of the secondary winding, the second capacitor operatively coupled between the center tap connection and a second end of the secondary winding, the diac operable to conduct a pulse of current through the primary winding of the pulse transformer in response to the timing voltage for charging the first capacitor during the positive half-cycles and the second capacitor during the negative half-cycles.

121. The load control device of claim 112, wherein the drive circuit controls the FETs using forward phase-control dimming.

122. The load control device of claim 112, wherein the drive circuit comprises a capacitor operable to charge from the AC power source through a potentiometer for generating the timing voltage across the capacitor, such that the timing voltage is responsive to the resistance of the potentiometer.

123. The load control device of claim 112, wherein the first FET is rendered conductive and the second FET is rendered non-conductive at substantially the same time during the positive half-cycles, and the first FET is rendered non-conductive and the second FET is rendered conductive at substantially the same time during the negative half-cycles.

124. The load control device of claim 112, wherein the drive circuit controls the first and second FETs such that at least one of the FETs is conductive at all times.

125. The load control device of claim 112, wherein the timing circuit comprises a diac for adjusting the magnitude of the timing voltage in response to the magnitude of an AC line voltage of the AC power source.